Commit 1578968f authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branches 'clk-imx6-mmdc', 'clk-qcom-krait', 'clk-rockchip' and... 

Merge branches 'clk-imx6-mmdc', 'clk-qcom-krait', 'clk-rockchip' and 'clk-smp2s11-match' into clk-next

  - iMX6 MMDC clks
  - Qualcomm Krait CPU clk support

* clk-imx6-mmdc:
  clk: imx6q: add mmdc0 ipg clock
  clk: imx6sl: add mmdc ipg clocks
  clk: imx6sll: add mmdc1 ipg clock
  clk: imx6sx: add mmdc1 ipg clock
  clk: imx6ul: add mmdc1 ipg clock

* clk-qcom-krait:
  clk: qcom: Add safe switch hook for krait mux clocks
  dt-bindings: clock: Document qcom,krait-cc
  clk: qcom: Add Krait clock controller driver
  dt-bindings: arm: Document qcom,kpss-gcc
  clk: qcom: Add KPSS ACC/GCC driver
  clk: qcom: Add support for Krait clocks
  clk: qcom: Add IPQ806X's HFPLLs
  clk: qcom: Add MSM8960/APQ8064's HFPLLs
  dt-bindings: clock: Document qcom,hfpll
  clk: qcom: Add HFPLL driver
  clk: qcom: Add support for High-Frequency PLLs (HFPLLs)
  ARM: Add Krait L2 register accessor functions

* clk-rockchip:
  clk: rockchip: Fix static checker warning in rockchip_ddrclk_get_parent call
  clk: rockchip: use the newly added clock-id for hdmi on RK3066
  clk: rockchip: add clock-id for HCLK_HDMI on rk3066
  clk: rockchip: fix wrong mmc sample phase shift for rk3328
  clk: rockchip: improve rk3288 pll rates for better hdmi output

* clk-smp2s11-match:
  clk: s2mps11: Add used attribute to s2mps11_dt_match
  clk: s2mps11: Fix matching when built as module and DT node contains compatible
parents 1fe7c040 341ce356 77612720 1b4d990b 9c940bbe

Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt

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@@ -21,10 +21,29 @@ PROPERTIES 
		    the register region. An optional second element specifies

		    the base address and size of the alias register region.



- clocks:

        Usage: required

        Value type: <prop-encoded-array>

        Definition: reference to the pll parents.



- clock-names:

        Usage: required

        Value type: <stringlist>

        Definition: must be "pll8_vote", "pxo".



- clock-output-names:

	Usage: optional

	Value type: <string>

	Definition: Name of the output clock. Typically acpuX_aux where X is a

		    CPU number starting at 0.



Example:



	clock-controller@2088000 {

		compatible = "qcom,kpss-acc-v2";

		reg = <0x02088000 0x1000>,

		      <0x02008000 0x1000>;

		clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>;

		clock-names = "pll8_vote", "pxo";

		clock-output-names = "acpu0_aux";

	};

Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt

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Krait Processor Sub-system (KPSS) Global Clock Controller (GCC)



PROPERTIES



- compatible:

	Usage: required

	Value type: <string>

	Definition: should be one of the following. The generic compatible

			"qcom,kpss-gcc" should also be included.

			"qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc"

			"qcom,kpss-gcc-apq8064", "qcom,kpss-gcc"

			"qcom,kpss-gcc-msm8974", "qcom,kpss-gcc"

			"qcom,kpss-gcc-msm8960", "qcom,kpss-gcc"



- reg:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: base address and size of the register region



- clocks:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: reference to the pll parents.



- clock-names:

	Usage: required

	Value type: <stringlist>

	Definition: must be "pll8_vote", "pxo".



- clock-output-names:

	Usage: required

	Value type: <string>

	Definition: Name of the output clock. Typically acpu_l2_aux indicating

		    an L2 cache auxiliary clock.



Example:



	l2cc: clock-controller@2011000 {

		compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc";

		reg = <0x2011000 0x1000>;

		clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>;

		clock-names = "pll8_vote", "pxo";

		clock-output-names = "acpu_l2_aux";

	};

Documentation/devicetree/bindings/clock/qcom,hfpll.txt

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High-Frequency PLL (HFPLL)



PROPERTIES



- compatible:

	Usage: required

	Value type: <string>:

		shall contain only one of the following. The generic

		compatible "qcom,hfpll" should be also included.



                        "qcom,hfpll-ipq8064", "qcom,hfpll"

                        "qcom,hfpll-apq8064", "qcom,hfpll"

                        "qcom,hfpll-msm8974", "qcom,hfpll"

                        "qcom,hfpll-msm8960", "qcom,hfpll"



- reg:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: address and size of HPLL registers. An optional second

		    element specifies the address and size of the alias

		    register region.



- clocks:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: reference to the xo clock.



- clock-names:

	Usage: required

	Value type: <stringlist>

	Definition: must be "xo".



- clock-output-names:

	Usage: required

	Value type: <string>

	Definition: Name of the PLL. Typically hfpllX where X is a CPU number

		    starting at 0. Otherwise hfpll_Y where Y is more specific

		    such as "l2".



Example:



1) An HFPLL for the L2 cache.



	clock-controller@f9016000 {

		compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";

		reg = <0xf9016000 0x30>;

		clocks = <&xo_board>;

		clock-names = "xo";

		clock-output-names = "hfpll_l2";

	};



2) An HFPLL for CPU0. This HFPLL has the alias register region.



	clock-controller@f908a000 {

		compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";

		reg = <0xf908a000 0x30>, <0xf900a000 0x30>;

		clocks = <&xo_board>;

		clock-names = "xo";

		clock-output-names = "hfpll0";

	};

Documentation/devicetree/bindings/clock/qcom,krait-cc.txt

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Krait Clock Controller



PROPERTIES



- compatible:

	Usage: required

	Value type: <string>

	Definition: must be one of:

			"qcom,krait-cc-v1"

			"qcom,krait-cc-v2"



- #clock-cells:

	Usage: required

	Value type: <u32>

	Definition: must be 1



- clocks:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: reference to the clock parents of hfpll, secondary muxes.



- clock-names:

	Usage: required

	Value type: <stringlist>

	Definition: must be "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb".



Example:



	kraitcc: clock-controller {

		compatible = "qcom,krait-cc-v1";

		clocks = <&hfpll0>, <&hfpll1>, <&acpu0_aux>, <&acpu1_aux>, <qsb>;

		clock-names = "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb";

		#clock-cells = <1>;

	};

arch/arm/common/Kconfig

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@@ -7,6 +7,9 @@ config DMABOUNCE 
	bool

	select ZONE_DMA



config KRAIT_L2_ACCESSORS

	bool



config SHARP_LOCOMO

	bool

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