[SCSI] mpt fusion: Fixing 1078 data corruption issue for 36GB memory region (14d0f0b0) · Commits · 戴 / test

drivers/message/fusion/mptbase.c

+237 −50

Original line number	Diff line number	Diff line
		@@ -998,7 +998,7 @@ mpt_free_msg_frame(MPT_ADAPTER ioc, MPT_FRAME_HDR mf)

		/=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=/
		/**
		* mpt_add_sge - Place a simple SGE at address pAddr.
		* mpt_add_sge - Place a simple 32 bit SGE at address pAddr.
		* @pAddr: virtual address for SGE
		* @flagslength: SGE flags and data transfer length
		* @dma_addr: Physical address
		@@ -1006,23 +1006,117 @@ mpt_free_msg_frame(MPT_ADAPTER ioc, MPT_FRAME_HDR mf)
		* This routine places a MPT request frame back on the MPT adapter's
		* FreeQ.
		*/
		void
		mpt_add_sge(char *pAddr, u32 flagslength, dma_addr_t dma_addr)
		static void
		mpt_add_sge(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
		{
		SGESimple32_t pSge = (SGESimple32_t ) pAddr;
		pSge->FlagsLength = cpu_to_le32(flagslength);
		pSge->Address = cpu_to_le32(dma_addr);
		}

		/**
		* mpt_add_sge_64bit - Place a simple 64 bit SGE at address pAddr.
		* @pAddr: virtual address for SGE
		* @flagslength: SGE flags and data transfer length
		* @dma_addr: Physical address
		*
		* This routine places a MPT request frame back on the MPT adapter's
		* FreeQ.
		**/
		static void
		mpt_add_sge_64bit(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
		{
		if (sizeof(dma_addr_t) == sizeof(u64)) {
		SGESimple64_t pSge = (SGESimple64_t ) pAddr;
		u32 tmp = dma_addr & 0xFFFFFFFF;
		pSge->Address.Low = cpu_to_le32
		(lower_32_bits((unsigned long)(dma_addr)));
		pSge->Address.High = cpu_to_le32
		(upper_32_bits((unsigned long)dma_addr));
		pSge->FlagsLength = cpu_to_le32
		((flagslength \| MPT_SGE_FLAGS_64_BIT_ADDRESSING));
		}

		/**
		* mpt_add_sge_64bit_1078 - Place a simple 64 bit SGE at address pAddr
		* (1078 workaround).
		* @pAddr: virtual address for SGE
		* @flagslength: SGE flags and data transfer length
		* @dma_addr: Physical address
		*
		* This routine places a MPT request frame back on the MPT adapter's
		* FreeQ.
		**/
		static void
		mpt_add_sge_64bit_1078(void *pAddr, u32 flagslength, dma_addr_t dma_addr)
		{
		SGESimple64_t pSge = (SGESimple64_t ) pAddr;
		u32 tmp;

		pSge->Address.Low = cpu_to_le32
		(lower_32_bits((unsigned long)(dma_addr)));
		tmp = (u32)(upper_32_bits((unsigned long)dma_addr));

		/*
		* 1078 errata workaround for the 36GB limitation
		*/
		if ((((u64)dma_addr + MPI_SGE_LENGTH(flagslength)) >> 32) == 9) {
		flagslength \|=
		MPI_SGE_SET_FLAGS(MPI_SGE_FLAGS_LOCAL_ADDRESS);
		tmp \|= (1<<31);
		if (mpt_debug_level & MPT_DEBUG_36GB_MEM)
		printk(KERN_DEBUG "1078 P0M2 addressing for "
		"addr = 0x%llx len = %d\n",
		(unsigned long long)dma_addr,
		MPI_SGE_LENGTH(flagslength));
		}

		pSge->FlagsLength = cpu_to_le32(flagslength);
		pSge->Address.Low = cpu_to_le32(tmp);
		tmp = (u32) ((u64)dma_addr >> 32);
		pSge->Address.High = cpu_to_le32(tmp);
		pSge->FlagsLength = cpu_to_le32(
		(flagslength \| MPT_SGE_FLAGS_64_BIT_ADDRESSING));
		}

		} else {
		SGESimple32_t pSge = (SGESimple32_t ) pAddr;
		pSge->FlagsLength = cpu_to_le32(flagslength);
		pSge->Address = cpu_to_le32(dma_addr);
		/=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=/
		/**
		* mpt_add_chain - Place a 32 bit chain SGE at address pAddr.
		* @pAddr: virtual address for SGE
		* @next: nextChainOffset value (u32's)
		* @length: length of next SGL segment
		* @dma_addr: Physical address
		*
		*/
		static void
		mpt_add_chain(void *pAddr, u8 next, u16 length, dma_addr_t dma_addr)
		{
		SGEChain32_t pChain = (SGEChain32_t ) pAddr;
		pChain->Length = cpu_to_le16(length);
		pChain->Flags = MPI_SGE_FLAGS_CHAIN_ELEMENT;
		pChain->NextChainOffset = next;
		pChain->Address = cpu_to_le32(dma_addr);
		}

		/=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=/
		/**
		* mpt_add_chain_64bit - Place a 64 bit chain SGE at address pAddr.
		* @pAddr: virtual address for SGE
		* @next: nextChainOffset value (u32's)
		* @length: length of next SGL segment
		* @dma_addr: Physical address
		*
		*/
		static void
		mpt_add_chain_64bit(void *pAddr, u8 next, u16 length, dma_addr_t dma_addr)
		{
		SGEChain64_t pChain = (SGEChain64_t ) pAddr;
		u32 tmp = dma_addr & 0xFFFFFFFF;

		pChain->Length = cpu_to_le16(length);
		pChain->Flags = (MPI_SGE_FLAGS_CHAIN_ELEMENT \|
		MPI_SGE_FLAGS_64_BIT_ADDRESSING);

		pChain->NextChainOffset = next;

		pChain->Address.Low = cpu_to_le32(tmp);
		tmp = (u32)(upper_32_bits((unsigned long)dma_addr));
		pChain->Address.High = cpu_to_le32(tmp);
		}

		/=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=/
		@@ -1225,7 +1319,7 @@ mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
		}
		flags_length = flags_length << MPI_SGE_FLAGS_SHIFT;
		flags_length \|= ioc->HostPageBuffer_sz;
		mpt_add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
		ioc->add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
		ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;

		return 0;
		@@ -1534,22 +1628,43 @@ mpt_mapresources(MPT_ADAPTER *ioc)

		pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);

		if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
		&& !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
		if (sizeof(dma_addr_t) > 4) {
		const uint64_t required_mask = dma_get_required_mask
		(&pdev->dev);
		if (required_mask > DMA_BIT_MASK(32)
		&& !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
		&& !pci_set_consistent_dma_mask(pdev,
		DMA_BIT_MASK(64))) {
		ioc->dma_mask = DMA_BIT_MASK(64);
		dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
		": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
		ioc->name));
		} else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
		&& !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
		&& !pci_set_consistent_dma_mask(pdev,
		DMA_BIT_MASK(32))) {
		ioc->dma_mask = DMA_BIT_MASK(32);
		dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
		": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
		ioc->name));
		} else {
		printk(MYIOC_s_WARN_FMT "no suitable DMA mask for %s\n",
		ioc->name, pci_name(pdev));
		pci_release_selected_regions(pdev, ioc->bars);
		return r;
		}
		} else {
		if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
		&& !pci_set_consistent_dma_mask(pdev,
		DMA_BIT_MASK(32))) {
		ioc->dma_mask = DMA_BIT_MASK(32);
		dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
		": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n",
		ioc->name));
		} else {
		printk(MYIOC_s_WARN_FMT "no suitable DMA mask for %s\n",
		ioc->name, pci_name(pdev));
		return r;
		}
		}

		mem_phys = msize = 0;
		port = psize = 0;
		@@ -1650,6 +1765,23 @@ mpt_attach(struct pci_dev pdev, const struct pci_device_id id)
		return r;
		}

		/*
		* Setting up proper handlers for scatter gather handling
		*/
		if (ioc->dma_mask == DMA_BIT_MASK(64)) {
		if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1078)
		ioc->add_sge = &mpt_add_sge_64bit_1078;
		else
		ioc->add_sge = &mpt_add_sge_64bit;
		ioc->add_chain = &mpt_add_chain_64bit;
		ioc->sg_addr_size = 8;
		} else {
		ioc->add_sge = &mpt_add_sge;
		ioc->add_chain = &mpt_add_chain;
		ioc->sg_addr_size = 4;
		}
		ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;

		ioc->alloc_total = sizeof(MPT_ADAPTER);
		ioc->req_sz = MPT_DEFAULT_FRAME_SIZE; /* avoid div by zero! */
		ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
		@@ -1994,6 +2126,21 @@ mpt_resume(struct pci_dev *pdev)
		if (err)
		return err;

		if (ioc->dma_mask == DMA_BIT_MASK(64)) {
		if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1078)
		ioc->add_sge = &mpt_add_sge_64bit_1078;
		else
		ioc->add_sge = &mpt_add_sge_64bit;
		ioc->add_chain = &mpt_add_chain_64bit;
		ioc->sg_addr_size = 8;
		} else {

		ioc->add_sge = &mpt_add_sge;
		ioc->add_chain = &mpt_add_chain;
		ioc->sg_addr_size = 4;
		}
		ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;

		printk(MYIOC_s_INFO_FMT "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
		ioc->name, (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
		CHIPREG_READ32(&ioc->chip->Doorbell));
		@@ -3325,11 +3472,10 @@ mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
		FWUpload_t *prequest;
		FWUploadReply_t *preply;
		FWUploadTCSGE_t *ptcsge;
		int sgeoffset;
		u32 flagsLength;
		int ii, sz, reply_sz;
		int cmdStatus;

		int request_size;
		/* If the image size is 0, we are done.
		*/
		if ((sz = ioc->facts.FWImageSize) == 0)
		@@ -3364,17 +3510,16 @@ mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
		ptcsge->ImageSize = cpu_to_le32(sz);
		ptcsge++;

		sgeoffset = sizeof(FWUpload_t) - sizeof(SGE_MPI_UNION) + sizeof(FWUploadTCSGE_t);

		flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ \| sz;
		mpt_add_sge((char *)ptcsge, flagsLength, ioc->cached_fw_dma);

		sgeoffset += sizeof(u32) + sizeof(dma_addr_t);
		dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": Sending FW Upload (req @ %p) sgeoffset=%d \n",
		ioc->name, prequest, sgeoffset));
		ioc->add_sge((char *)ptcsge, flagsLength, ioc->cached_fw_dma);
		request_size = offsetof(FWUpload_t, SGL) + sizeof(FWUploadTCSGE_t) +
		ioc->SGE_size;
		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending FW Upload "
		" (req @ %p) fw_size=%d mf_request_size=%d\n", ioc->name, prequest,
		ioc->facts.FWImageSize, request_size));
		DBG_DUMP_FW_REQUEST_FRAME(ioc, (u32 *)prequest);

		ii = mpt_handshake_req_reply_wait(ioc, sgeoffset, (u32*)prequest,
		ii = mpt_handshake_req_reply_wait(ioc, request_size, (u32 *)prequest,
		reply_sz, (u16 )preply, 65 /seconds*/, sleepFlag);

		dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": FW Upload completed rc=%x \n", ioc->name, ii));
		@@ -4090,18 +4235,18 @@ initChainBuffers(MPT_ADAPTER *ioc)
		* num_sge = num sge in request frame + last chain buffer
		* scale = num sge per chain buffer if no chain element
		*/
		scale = ioc->req_sz/(sizeof(dma_addr_t) + sizeof(u32));
		if (sizeof(dma_addr_t) == sizeof(u64))
		num_sge = scale + (ioc->req_sz - 60) / (sizeof(dma_addr_t) + sizeof(u32));
		scale = ioc->req_sz / ioc->SGE_size;
		if (ioc->sg_addr_size == sizeof(u64))
		num_sge = scale + (ioc->req_sz - 60) / ioc->SGE_size;
		else
		num_sge = 1+ scale + (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32));
		num_sge = 1 + scale + (ioc->req_sz - 64) / ioc->SGE_size;

		if (sizeof(dma_addr_t) == sizeof(u64)) {
		if (ioc->sg_addr_size == sizeof(u64)) {
		numSGE = (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
		(ioc->req_sz - 60) / (sizeof(dma_addr_t) + sizeof(u32));
		(ioc->req_sz - 60) / ioc->SGE_size;
		} else {
		numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
		(ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32));
		numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) +
		scale + (ioc->req_sz - 64) / ioc->SGE_size;
		}
		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "num_sge=%d numSGE=%d\n",
		ioc->name, num_sge, numSGE));
		@@ -4161,12 +4306,42 @@ PrimeIocFifos(MPT_ADAPTER *ioc)
		dma_addr_t alloc_dma;
		u8 *mem;
		int i, reply_sz, sz, total_size, num_chain;
		u64 dma_mask;

		dma_mask = 0;

		/* Prime reply FIFO... */

		if (ioc->reply_frames == NULL) {
		if ( (num_chain = initChainBuffers(ioc)) < 0)
		return -1;
		/*
		* 1078 errata workaround for the 36GB limitation
		*/
		if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078 &&
		ioc->dma_mask > DMA_35BIT_MASK) {
		if (!pci_set_dma_mask(ioc->pcidev, DMA_BIT_MASK(32))
		&& !pci_set_consistent_dma_mask(ioc->pcidev,
		DMA_BIT_MASK(32))) {
		dma_mask = DMA_35BIT_MASK;
		d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
		"setting 35 bit addressing for "
		"Request/Reply/Chain and Sense Buffers\n",
		ioc->name));
		} else {
		/Reseting DMA mask to 64 bit/
		pci_set_dma_mask(ioc->pcidev,
		DMA_BIT_MASK(64));
		pci_set_consistent_dma_mask(ioc->pcidev,
		DMA_BIT_MASK(64));

		printk(MYIOC_s_ERR_FMT
		"failed setting 35 bit addressing for "
		"Request/Reply/Chain and Sense Buffers\n",
		ioc->name);
		return -1;
		}
		}

		total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth);
		dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d bytes, ReplyDepth=%d\n",
		@@ -4305,6 +4480,12 @@ PrimeIocFifos(MPT_ADAPTER *ioc)
		alloc_dma += ioc->reply_sz;
		}

		if (dma_mask == DMA_35BIT_MASK && !pci_set_dma_mask(ioc->pcidev,
		ioc->dma_mask) && !pci_set_consistent_dma_mask(ioc->pcidev,
		ioc->dma_mask))
		d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
		"restoring 64 bit addressing\n", ioc->name));

		return 0;

		out_fail:
		@@ -4324,6 +4505,13 @@ out_fail:
		ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
		ioc->sense_buf_pool = NULL;
		}

		if (dma_mask == DMA_35BIT_MASK && !pci_set_dma_mask(ioc->pcidev,
		DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(ioc->pcidev,
		DMA_BIT_MASK(64)))
		d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
		"restoring 64 bit addressing\n", ioc->name));

		return -1;
		}

		@@ -5926,7 +6114,7 @@ mpt_config(MPT_ADAPTER ioc, CONFIGPARMS pCfg)
		ioc->name, pReq->Header.PageType, pReq->Header.PageNumber, pReq->Action));
		}

		mpt_add_sge((char *)&pReq->PageBufferSGE, flagsLength, pCfg->physAddr);
		ioc->add_sge((char *)&pReq->PageBufferSGE, flagsLength, pCfg->physAddr);

		/* Append pCfg pointer to end of mf
		*/
		@@ -7613,7 +7801,6 @@ EXPORT_SYMBOL(mpt_get_msg_frame);
		EXPORT_SYMBOL(mpt_put_msg_frame);
		EXPORT_SYMBOL(mpt_put_msg_frame_hi_pri);
		EXPORT_SYMBOL(mpt_free_msg_frame);
		EXPORT_SYMBOL(mpt_add_sge);
		EXPORT_SYMBOL(mpt_send_handshake_request);
		EXPORT_SYMBOL(mpt_verify_adapter);
		EXPORT_SYMBOL(mpt_GetIocState);

drivers/message/fusion/mptbase.h

+22 −13

Original line number	Diff line number	Diff line
		@@ -76,8 +76,8 @@
		#define COPYRIGHT "Copyright (c) 1999-2008 " MODULEAUTHOR
		#endif

		#define MPT_LINUX_VERSION_COMMON "3.04.07"
		#define MPT_LINUX_PACKAGE_NAME "@(#)mptlinux-3.04.07"
		#define MPT_LINUX_VERSION_COMMON "3.04.08"
		#define MPT_LINUX_PACKAGE_NAME "@(#)mptlinux-3.04.08"
		#define WHAT_MAGIC_STRING "@" "(" "#" ")"

		#define show_mptmod_ver(s,ver) \
		@@ -134,6 +134,7 @@

		#define MPT_COALESCING_TIMEOUT 0x10


		/*
		* SCSI transfer rate defines.
		*/
		@@ -564,6 +565,10 @@ struct mptfc_rport_info
		u8 flags;
		};

		typedef void (MPT_ADD_SGE)(void pAddr, u32 flagslength, dma_addr_t dma_addr);
		typedef void (MPT_ADD_CHAIN)(void pAddr, u8 next, u16 length,
		dma_addr_t dma_addr);

		/*
		* Adapter Structure - pci_dev specific. Maximum: MPT_MAX_ADAPTERS
		*/
		@@ -600,6 +605,10 @@ typedef struct _MPT_ADAPTER
		int reply_depth; /* Num Allocated reply frames */
		int reply_sz; /* Reply frame size */
		int num_chain; /* Number of chain buffers */
		MPT_ADD_SGE add_sge; /* Pointer to add_sge
		function */
		MPT_ADD_CHAIN add_chain; /* Pointer to add_chain
		function */
		/* Pool of buffers for chaining. ReqToChain
		* and ChainToChain track index of chain buffers.
		* ChainBuffer (DMA) virt/phys addresses.
		@@ -711,12 +720,15 @@ typedef struct _MPT_ADAPTER
		struct workqueue_struct *fc_rescan_work_q;
		struct scsi_cmnd **ScsiLookup;
		spinlock_t scsi_lookup_lock;

		u64 dma_mask;
		char reset_work_q_name[20];
		struct workqueue_struct *reset_work_q;
		struct delayed_work fault_reset_work;
		spinlock_t fault_reset_work_lock;

		u8 sg_addr_size;
		u8 SGE_size;

		} MPT_ADAPTER;

		/*
		@@ -753,13 +765,14 @@ typedef struct _mpt_sge {
		dma_addr_t Address;
		} MptSge_t;

		#define mpt_addr_size() \
		((sizeof(dma_addr_t) == sizeof(u64)) ? MPI_SGE_FLAGS_64_BIT_ADDRESSING : \
		MPI_SGE_FLAGS_32_BIT_ADDRESSING)

		#define mpt_msg_flags() \
		((sizeof(dma_addr_t) == sizeof(u64)) ? MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 : \
		MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32)
		#define mpt_msg_flags(ioc) \
		(ioc->sg_addr_size == sizeof(u64)) ? \
		MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 : \
		MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32

		#define MPT_SGE_FLAGS_64_BIT_ADDRESSING \
		(MPI_SGE_FLAGS_64_BIT_ADDRESSING << MPI_SGE_FLAGS_SHIFT)

		/=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=/
		/*
		@@ -909,7 +922,6 @@ extern MPT_FRAME_HDR mpt_get_msg_frame(u8 cb_idx, MPT_ADAPTER ioc);
		extern void mpt_free_msg_frame(MPT_ADAPTER ioc, MPT_FRAME_HDR mf);
		extern void mpt_put_msg_frame(u8 cb_idx, MPT_ADAPTER ioc, MPT_FRAME_HDR mf);
		extern void mpt_put_msg_frame_hi_pri(u8 cb_idx, MPT_ADAPTER ioc, MPT_FRAME_HDR mf);
		extern void mpt_add_sge(char *pAddr, u32 flagslength, dma_addr_t dma_addr);

		extern int mpt_send_handshake_request(u8 cb_idx, MPT_ADAPTER ioc, int reqBytes, u32 req, int sleepFlag);
		extern int mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp);
		@@ -959,7 +971,6 @@ extern int mpt_fwfault_debug;
		#define MPT_SGE_FLAGS_END_OF_BUFFER (0x40000000)
		#define MPT_SGE_FLAGS_LOCAL_ADDRESS (0x08000000)
		#define MPT_SGE_FLAGS_DIRECTION (0x04000000)
		#define MPT_SGE_FLAGS_ADDRESSING (mpt_addr_size() << MPI_SGE_FLAGS_SHIFT)
		#define MPT_SGE_FLAGS_END_OF_LIST (0x01000000)

		#define MPT_SGE_FLAGS_TRANSACTION_ELEMENT (0x00000000)
		@@ -972,14 +983,12 @@ extern int mpt_fwfault_debug;
		MPT_SGE_FLAGS_END_OF_BUFFER \| \
		MPT_SGE_FLAGS_END_OF_LIST \| \
		MPT_SGE_FLAGS_SIMPLE_ELEMENT \| \
		MPT_SGE_FLAGS_ADDRESSING \| \
		MPT_TRANSFER_IOC_TO_HOST)
		#define MPT_SGE_FLAGS_SSIMPLE_WRITE \
		(MPT_SGE_FLAGS_LAST_ELEMENT \| \
		MPT_SGE_FLAGS_END_OF_BUFFER \| \
		MPT_SGE_FLAGS_END_OF_LIST \| \
		MPT_SGE_FLAGS_SIMPLE_ELEMENT \| \
		MPT_SGE_FLAGS_ADDRESSING \| \
		MPT_TRANSFER_HOST_TO_IOC)

		/}-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=/

drivers/message/fusion/mptctl.c

+19 −18

Original line number	Diff line number	Diff line
		@@ -841,8 +841,9 @@ mptctl_do_fw_download(int ioc, char __user *ufwbuf, size_t fwlen)
		* 96 8
		* 64 4
		*/
		maxfrags = (iocp->req_sz - sizeof(MPIHeader_t) - sizeof(FWDownloadTCSGE_t))
		/ (sizeof(dma_addr_t) + sizeof(u32));
		maxfrags = (iocp->req_sz - sizeof(MPIHeader_t) -
		sizeof(FWDownloadTCSGE_t))
		/ iocp->SGE_size;
		if (numfrags > maxfrags) {
		ret = -EMLINK;
		goto fwdl_out;
		@@ -870,7 +871,7 @@ mptctl_do_fw_download(int ioc, char __user *ufwbuf, size_t fwlen)
		if (nib == 0 \|\| nib == 3) {
		;
		} else if (sgIn->Address) {
		mpt_add_sge(sgOut, sgIn->FlagsLength, sgIn->Address);
		iocp->add_sge(sgOut, sgIn->FlagsLength, sgIn->Address);
		n++;
		if (copy_from_user(bl->kptr, ufwbuf+fw_bytes_copied, bl->len)) {
		printk(MYIOC_s_ERR_FMT "%s@%d::_ioctl_fwdl - "
		@@ -882,7 +883,7 @@ mptctl_do_fw_download(int ioc, char __user *ufwbuf, size_t fwlen)
		}
		sgIn++;
		bl++;
		sgOut += (sizeof(dma_addr_t) + sizeof(u32));
		sgOut += iocp->SGE_size;
		}

		DBG_DUMP_FW_DOWNLOAD(iocp, (u32 *)mf, numfrags);
		@@ -1003,7 +1004,7 @@ kbuf_alloc_2_sgl(int bytes, u32 sgdir, int sge_offset, int *frags,
		*
		*/
		sgl = sglbuf;
		sg_spill = ((ioc->req_sz - sge_offset)/(sizeof(dma_addr_t) + sizeof(u32))) - 1;
		sg_spill = ((ioc->req_sz - sge_offset)/ioc->SGE_size) - 1;
		while (bytes_allocd < bytes) {
		this_alloc = min(alloc_sz, bytes-bytes_allocd);
		buflist[buflist_ent].len = this_alloc;
		@@ -1024,8 +1025,9 @@ kbuf_alloc_2_sgl(int bytes, u32 sgdir, int sge_offset, int *frags,
		dma_addr_t dma_addr;

		bytes_allocd += this_alloc;
		sgl->FlagsLength = (0x10000000\|MPT_SGE_FLAGS_ADDRESSING\|sgdir\|this_alloc);
		dma_addr = pci_map_single(ioc->pcidev, buflist[buflist_ent].kptr, this_alloc, dir);
		sgl->FlagsLength = (0x10000000\|sgdir\|this_alloc);
		dma_addr = pci_map_single(ioc->pcidev,
		buflist[buflist_ent].kptr, this_alloc, dir);
		sgl->Address = dma_addr;

		fragcnt++;
		@@ -1799,9 +1801,9 @@ mptctl_do_mpt_command (struct mpt_ioctl_command karg, void __user *mfPtr)
		*/
		sz = karg.dataSgeOffset * 4;
		if (karg.dataInSize > 0)
		sz += sizeof(dma_addr_t) + sizeof(u32);
		sz += ioc->SGE_size;
		if (karg.dataOutSize > 0)
		sz += sizeof(dma_addr_t) + sizeof(u32);
		sz += ioc->SGE_size;

		if (sz > ioc->req_sz) {
		printk(MYIOC_s_ERR_FMT "%s@%d::mptctl_do_mpt_command - "
		@@ -1893,7 +1895,7 @@ mptctl_do_mpt_command (struct mpt_ioctl_command karg, void __user *mfPtr)
		}

		pScsiReq->MsgFlags &= ~MPI_SCSIIO_MSGFLGS_SENSE_WIDTH;
		pScsiReq->MsgFlags \|= mpt_msg_flags();
		pScsiReq->MsgFlags \|= mpt_msg_flags(ioc);


		/* verify that app has not requested
		@@ -1979,7 +1981,7 @@ mptctl_do_mpt_command (struct mpt_ioctl_command karg, void __user *mfPtr)
		int dataSize;

		pScsiReq->MsgFlags &= ~MPI_SCSIIO_MSGFLGS_SENSE_WIDTH;
		pScsiReq->MsgFlags \|= mpt_msg_flags();
		pScsiReq->MsgFlags \|= mpt_msg_flags(ioc);


		/* verify that app has not requested
		@@ -2123,8 +2125,7 @@ mptctl_do_mpt_command (struct mpt_ioctl_command karg, void __user *mfPtr)
		if (karg.dataInSize > 0) {
		flagsLength = ( MPI_SGE_FLAGS_SIMPLE_ELEMENT \|
		MPI_SGE_FLAGS_END_OF_BUFFER \|
		MPI_SGE_FLAGS_DIRECTION \|
		mpt_addr_size() )
		MPI_SGE_FLAGS_DIRECTION)
		<< MPI_SGE_FLAGS_SHIFT;
		} else {
		flagsLength = MPT_SGE_FLAGS_SSIMPLE_WRITE;
		@@ -2141,8 +2142,8 @@ mptctl_do_mpt_command (struct mpt_ioctl_command karg, void __user *mfPtr)
		/* Set up this SGE.
		* Copy to MF and to sglbuf
		*/
		mpt_add_sge(psge, flagsLength, dma_addr_out);
		psge += (sizeof(u32) + sizeof(dma_addr_t));
		ioc->add_sge(psge, flagsLength, dma_addr_out);
		psge += ioc->SGE_size;

		/* Copy user data to kernel space.
		*/
		@@ -2175,13 +2176,13 @@ mptctl_do_mpt_command (struct mpt_ioctl_command karg, void __user *mfPtr)
		/* Set up this SGE
		* Copy to MF and to sglbuf
		*/
		mpt_add_sge(psge, flagsLength, dma_addr_in);
		ioc->add_sge(psge, flagsLength, dma_addr_in);
		}
		}
		} else {
		/* Add a NULL SGE
		*/
		mpt_add_sge(psge, flagsLength, (dma_addr_t) -1);
		ioc->add_sge(psge, flagsLength, (dma_addr_t) -1);
		}

		ioc->ioctl->wait_done = 0;
		@@ -2498,7 +2499,7 @@ mptctl_hp_hostinfo(unsigned long arg, unsigned int data_size)
		pbuf = pci_alloc_consistent(ioc->pcidev, 4, &buf_dma);
		if (!pbuf)
		goto out;
		mpt_add_sge((char *)&IstwiRWRequest->SGL,
		ioc->add_sge((char *)&IstwiRWRequest->SGL,
		(MPT_SGE_FLAGS_SSIMPLE_READ\|4), buf_dma);

		ioc->ioctl->wait_done = 0;

drivers/message/fusion/mptdebug.h

+3 −0

Original line number	Diff line number	Diff line
		@@ -58,6 +58,7 @@
		#define MPT_DEBUG_FC 0x00080000
		#define MPT_DEBUG_SAS 0x00100000
		#define MPT_DEBUG_SAS_WIDE 0x00200000
		#define MPT_DEBUG_36GB_MEM 0x00400000

		/*
		* CONFIG_FUSION_LOGGING - enabled in Kconfig
		@@ -135,6 +136,8 @@
		#define dsaswideprintk(IOC, CMD) \
		MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SAS_WIDE)

		#define d36memprintk(IOC, CMD) \
		MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_36GB_MEM)


		/*

drivers/message/fusion/mptfc.c

+4 −6

Original line number	Diff line number	Diff line
		@@ -1251,17 +1251,15 @@ mptfc_probe(struct pci_dev pdev, const struct pci_device_id id)
		* A slightly different algorithm is required for
		* 64bit SGEs.
		*/
		scale = ioc->req_sz/(sizeof(dma_addr_t) + sizeof(u32));
		if (sizeof(dma_addr_t) == sizeof(u64)) {
		scale = ioc->req_sz/ioc->SGE_size;
		if (ioc->sg_addr_size == sizeof(u64)) {
		numSGE = (scale - 1) *
		(ioc->facts.MaxChainDepth-1) + scale +
		(ioc->req_sz - 60) / (sizeof(dma_addr_t) +
		sizeof(u32));
		(ioc->req_sz - 60) / ioc->SGE_size;
		} else {
		numSGE = 1 + (scale - 1) *
		(ioc->facts.MaxChainDepth-1) + scale +
		(ioc->req_sz - 64) / (sizeof(dma_addr_t) +
		sizeof(u32));
		(ioc->req_sz - 64) / ioc->SGE_size;
		}

		if (numSGE < sh->sg_tablesize) {

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