Commit 14ae7665 authored by Paul Hsieh's avatar Paul Hsieh Committed by Alex Deucher
Browse files

drm/amd/display: check pipe_ctx is split pipe or not 



[Why]
Driver use pipe_ctx to reallocate payload may cause allocate
payload twice on same sink with split pipe.

[How]
Drvier must to check pipe_ctx is split pipe or not to avoid
reallocate payload twice on same sink.

Signed-off-by: default avatarPaul Hsieh <paul.hsieh@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 830821a6

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+15 −2
Original line number Diff line number Diff line
@@ -2882,7 +2882,16 @@ enum dc_status dc_link_reallocate_mst_payload(struct dc_link *link) 
	// Clear all of MST payload then reallocate

	for (i = 0; i < MAX_PIPES; i++) {

		pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i];

		if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link == link &&



		/* driver enable split pipe for external monitors

		 * we have to check pipe_ctx is split pipe or not

		 * If it's split pipe, driver using top pipe to

		 * reaallocate.

		 */

		if (!pipe_ctx || pipe_ctx->top_pipe)

			continue;



		if (pipe_ctx->stream && pipe_ctx->stream->link == link &&

				pipe_ctx->stream->dpms_off == false &&

				pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {

			deallocate_mst_payload(pipe_ctx);
@@ -2891,7 +2900,11 @@ enum dc_status dc_link_reallocate_mst_payload(struct dc_link *link) 


	for (i = 0; i < MAX_PIPES; i++) {

		pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i];

		if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link == link &&



		if (!pipe_ctx || pipe_ctx->top_pipe)

			continue;



		if (pipe_ctx->stream && pipe_ctx->stream->link == link &&

				pipe_ctx->stream->dpms_off == false &&

				pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {

			/* enable/disable PHY will clear connection between BE and FE

CRA Git | Maintained and supported by SUSTech CRA and CCSE