Commit 1474f44e authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'davinci-for-v4.10/soc' of... 

Merge tag 'davinci-for-v4.10/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc

DaVinci SoC support improvements mainly towards an effort to
get to working USB support.

- use CFGCHIP syscon device to access common registers

- define platform data and device tree nodes for newly
  introduced USB phy driver

- clock lookup and auxdata lookup for USB phy and also
  for LCDC (LCD controller)

* tag 'davinci-for-v4.10/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci

:
  ARM: davinci: da8xx: register USB PHY clocks in the DT file
  ARM: davinci: da8xx: add usb phy clocks
  ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for USB phy
  ARM: davinci: da8xx: Add USB device names to clock lookup tables
  ARM: davinci: da8xx: Add USB PHY platform device
  ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for lcdc
  ARM: davinci: da8xx: Add full regulator constraints for non-DT boot
  ARM: davinci: da8xx: Add CFGCHIP syscon platform device

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents e6caea6e ced95ac0

arch/arm/mach-davinci/board-da830-evm.c

+21 −34
Original line number Diff line number Diff line
@@ -18,7 +18,6 @@ 
#include <linux/i2c.h>

#include <linux/i2c/pcf857x.h>

#include <linux/platform_data/at24.h>

#include <linux/mfd/da8xx-cfgchip.h>

#include <linux/mtd/mtd.h>

#include <linux/mtd/partitions.h>

#include <linux/spi/spi.h>
@@ -28,6 +27,7 @@ 
#include <linux/platform_data/mtd-davinci-aemif.h>

#include <linux/platform_data/spi-davinci.h>

#include <linux/platform_data/usb-davinci.h>

#include <linux/regulator/machine.h>



#include <asm/mach-types.h>

#include <asm/mach/arch.h>
@@ -107,43 +107,24 @@ static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id) 


static __init void da830_evm_usb_init(void)

{

	u32 cfgchip2;

	int ret;



	/*

	 * Set up USB clock/mode in the CFGCHIP2 register.

	 * FYI:  CFGCHIP2 is 0x0000ef00 initially.

	 */

	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));



	/* USB2.0 PHY reference clock is 24 MHz */

	cfgchip2 &= ~CFGCHIP2_REFFREQ_MASK;

	cfgchip2 |=  CFGCHIP2_REFFREQ_24MHZ;



	/*

	 * Select internal reference clock for USB 2.0 PHY

	 * and use it as a clock source for USB 1.1 PHY

	 * (this is the default setting anyway).

	 */

	cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;

	cfgchip2 |=  CFGCHIP2_USB2PHYCLKMUX;

	/* USB_REFCLKIN is not used. */

	ret = da8xx_register_usb20_phy_clk(false);

	if (ret)

		pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",

			__func__, ret);



	/*

	 * We have to override VBUS/ID signals when MUSB is configured into the

	 * host-only mode -- ID pin will float if no cable is connected, so the

	 * controller won't be able to drive VBUS thinking that it's a B-device.

	 * Otherwise, we want to use the OTG mode and enable VBUS comparators.

	 */

	cfgchip2 &= ~CFGCHIP2_OTGMODE_MASK;

#ifdef	CONFIG_USB_MUSB_HOST

	cfgchip2 |=  CFGCHIP2_FORCE_HOST;

#else

	cfgchip2 |=  CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;

#endif

	ret = da8xx_register_usb11_phy_clk(false);

	if (ret)

		pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",

			__func__, ret);



	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));

	ret = da8xx_register_usb_phy();

	if (ret)

		pr_warn("%s: USB PHY registration failed: %d\n",

			__func__, ret);



	/* USB_REFCLKIN is not used. */

	ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);

	if (ret)

		pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret);
@@ -589,6 +570,10 @@ static __init void da830_evm_init(void) 
	struct davinci_soc_info *soc_info = &davinci_soc_info;

	int ret;



	ret = da8xx_register_cfgchip();

	if (ret)

		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);



	ret = da830_register_gpio();

	if (ret)

		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
@@ -648,6 +633,8 @@ static __init void da830_evm_init(void) 
	ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));

	if (ret)

		pr_warn("%s: spi 0 registration failed: %d\n", __func__, ret);



	regulator_has_full_constraints();

}



#ifdef CONFIG_SERIAL_8250_CONSOLE

arch/arm/mach-davinci/board-da850-evm.c

+4 −0
Original line number Diff line number Diff line
@@ -1345,6 +1345,10 @@ static __init void da850_evm_init(void) 
{

	int ret;



	ret = da8xx_register_cfgchip();

	if (ret)

		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);



	ret = da850_register_gpio();

	if (ret)

		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);

arch/arm/mach-davinci/board-mityomapl138.c

+4 −0
Original line number Diff line number Diff line
@@ -514,6 +514,10 @@ static void __init mityomapl138_init(void) 
{

	int ret;



	ret = da8xx_register_cfgchip();

	if (ret)

		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);



	/* for now, no special EDMA channels are reserved */

	ret = da850_register_edma(NULL);

	if (ret)

arch/arm/mach-davinci/board-omapl138-hawk.c

+20 −7
Original line number Diff line number Diff line
@@ -13,8 +13,8 @@ 
#include <linux/init.h>

#include <linux/console.h>

#include <linux/gpio.h>

#include <linux/mfd/da8xx-cfgchip.h>

#include <linux/platform_data/gpio-davinci.h>

#include <linux/regulator/machine.h>



#include <asm/mach-types.h>

#include <asm/mach/arch.h>
@@ -244,7 +244,6 @@ static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id) 
static __init void omapl138_hawk_usb_init(void)

{

	int ret;

	u32 cfgchip2;



	ret = davinci_cfg_reg_list(da850_hawk_usb11_pins);

	if (ret) {
@@ -252,12 +251,20 @@ static __init void omapl138_hawk_usb_init(void) 
		return;

	}



	/* Setup the Ref. clock frequency for the HAWK at 24 MHz. */

	ret = da8xx_register_usb20_phy_clk(false);

	if (ret)

		pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",

			__func__, ret);



	ret = da8xx_register_usb11_phy_clk(false);

	if (ret)

		pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",

			__func__, ret);



	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));

	cfgchip2 &= ~CFGCHIP2_REFFREQ_MASK;

	cfgchip2 |=  CFGCHIP2_REFFREQ_24MHZ;

	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));

	ret = da8xx_register_usb_phy();

	if (ret)

		pr_warn("%s: USB PHY registration failed: %d\n",

			__func__, ret);



	ret = gpio_request_one(DA850_USB1_VBUS_PIN,

			GPIOF_DIR_OUT, "USB1 VBUS");
@@ -293,6 +300,10 @@ static __init void omapl138_hawk_init(void) 
{

	int ret;



	ret = da8xx_register_cfgchip();

	if (ret)

		pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret);



	ret = da850_register_gpio();

	if (ret)

		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
@@ -318,6 +329,8 @@ static __init void omapl138_hawk_init(void) 
	if (ret)

		pr_warn("%s: dsp/rproc registration failed: %d\n",

			__func__, ret);



	regulator_has_full_constraints();

}



#ifdef CONFIG_SERIAL_8250_CONSOLE

arch/arm/mach-davinci/da830.c

+2 −2
Original line number Diff line number Diff line
@@ -412,7 +412,7 @@ static struct clk_lookup da830_clks[] = { 
	CLK("davinci-mcasp.0",	NULL,		&mcasp0_clk),

	CLK("davinci-mcasp.1",	NULL,		&mcasp1_clk),

	CLK("davinci-mcasp.2",	NULL,		&mcasp2_clk),

	CLK(NULL,		"usb20",	&usb20_clk),

	CLK("musb-da8xx",	"usb20",	&usb20_clk),

	CLK(NULL,		"aemif",	&aemif_clk),

	CLK(NULL,		"aintc",	&aintc_clk),

	CLK(NULL,		"secu_mgr",	&secu_mgr_clk),
@@ -420,7 +420,7 @@ static struct clk_lookup da830_clks[] = { 
	CLK("davinci_mdio.0",   "fck",          &emac_clk),

	CLK(NULL,		"gpio",		&gpio_clk),

	CLK("i2c_davinci.2",	NULL,		&i2c1_clk),

	CLK(NULL,		"usb11",	&usb11_clk),

	CLK("ohci",		"usb11",	&usb11_clk),

	CLK(NULL,		"emif3",	&emif3_clk),

	CLK(NULL,		"arm",		&arm_clk),

	CLK(NULL,		"rmii",		&rmii_clk),

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