Commit 144651d1 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'i40e' 



Aaron Brown says:

====================
Intel Wired LAN Driver Updates

This series contains updates to i40e.

Neerav implements DCB and DCBNL support and adds DCB options
to Kconfig.  DCB is disabled by default.

Anjali refactors flow control director to fix inconsistencies
that were preventing clean unloads of the driver, move the
queues for handling flow director error into their own hardware
VSI and implement a corrected version of the basic ethtool add
ntuple rule.

Jesse provides fixes for a compiler warning, firmware workaround,
white space fixes and renames some defines.

Shannon reworks the device ID #defines to follow the
DEV_ID_ convention followed by our other drivers.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents c9151497 ab60085e

drivers/net/ethernet/intel/Kconfig

+8 −0
Original line number Diff line number Diff line
@@ -271,6 +271,14 @@ config I40E_VXLAN 
	  Say Y here if you want to use Virtual eXtensible Local Area Network

	  (VXLAN) in the driver.



config I40E_DCB

	bool "Data Center Bridging (DCB) Support"

	default n

	depends on I40E && DCB

	---help---

	  Say Y here if you want to use Data Center Bridging (DCB) in the

	  driver.



	  If unsure, say N.



config I40EVF

drivers/net/ethernet/intel/i40e/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -42,3 +42,5 @@ i40e-objs := i40e_main.o \ 
	i40e_txrx.o	\

	i40e_ptp.o	\

	i40e_virtchnl_pf.o



i40e-$(CONFIG_I40E_DCB) += i40e_dcb.o i40e_dcb_nl.o

drivers/net/ethernet/intel/i40e/i40e.h

+16 −5
Original line number Diff line number Diff line
@@ -57,13 +57,13 @@ 
#include "i40e_virtchnl.h"

#include "i40e_virtchnl_pf.h"

#include "i40e_txrx.h"

#include "i40e_dcb.h"



/* Useful i40e defaults */

#define I40E_BASE_PF_SEID     16

#define I40E_BASE_VSI_SEID    512

#define I40E_BASE_VEB_SEID    288

#define I40E_MAX_VEB          16

#define I40E_MAX_NPAR_QPS     32



#define I40E_MAX_NUM_DESCRIPTORS      4096

#define I40E_MAX_REGISTER     0x800000
@@ -75,6 +75,7 @@ 
#define I40E_DEFAULT_QUEUES_PER_VMDQ  2 /* max 16 qps */

#define I40E_DEFAULT_QUEUES_PER_VF    4

#define I40E_DEFAULT_QUEUES_PER_TC    1 /* should be a power of 2 */

#define I40E_MAX_QUEUES_PER_TC        64 /* should be a power of 2 */

#define I40E_FDIR_RING                0

#define I40E_FDIR_RING_COUNT          32

#define I40E_MAX_AQ_BUF_SIZE          4096
@@ -164,6 +165,8 @@ struct i40e_fdir_data { 
	u8  *raw_packet;

};



#define I40E_ETH_P_LLDP			0x88cc



#define I40E_DCB_PRIO_TYPE_STRICT	0

#define I40E_DCB_PRIO_TYPE_ETS		1

#define I40E_DCB_STRICT_PRIO_CREDITS	127
@@ -198,7 +201,6 @@ struct i40e_pf { 
	u16 num_vmdq_msix;         /* num queue vectors per vmdq pool */

	u16 num_req_vfs;           /* num vfs requested for this vf */

	u16 num_vf_qps;            /* num queue pairs per vf */

	u16 num_tc_qps;            /* num queue pairs per TC */

	u16 num_lan_qps;           /* num lan queues this pf has set up */

	u16 num_lan_msix;          /* num queue vectors for the base pf vsi */

	int queues_left;           /* queues left unclaimed */
@@ -241,8 +243,8 @@ struct i40e_pf { 
#define I40E_FLAG_PROCESS_VFLR_EVENT           (u64)(1 << 18)

#define I40E_FLAG_SRIOV_ENABLED                (u64)(1 << 19)

#define I40E_FLAG_DCB_ENABLED                  (u64)(1 << 20)

#define I40E_FLAG_FDIR_ENABLED                 (u64)(1 << 21)

#define I40E_FLAG_FDIR_ATR_ENABLED             (u64)(1 << 22)

#define I40E_FLAG_FD_SB_ENABLED                (u64)(1 << 21)

#define I40E_FLAG_FD_ATR_ENABLED               (u64)(1 << 22)

#define I40E_FLAG_PTP                          (u64)(1 << 25)

#define I40E_FLAG_MFP_ENABLED                  (u64)(1 << 26)

#ifdef CONFIG_I40E_VXLAN
@@ -553,6 +555,7 @@ struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid, 
				u16 downlink_seid, u8 enabled_tc);

void i40e_veb_release(struct i40e_veb *veb);



int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);

i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);

void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);

void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
@@ -581,7 +584,15 @@ bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi); 
struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,

				      bool is_vf, bool is_netdev);

void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);



#ifdef CONFIG_I40E_DCB

void i40e_dcbnl_flush_apps(struct i40e_pf *pf,

			   struct i40e_dcbx_config *new_cfg);

void i40e_dcbnl_set_all(struct i40e_vsi *vsi);

void i40e_dcbnl_setup(struct i40e_vsi *vsi);

bool i40e_dcb_need_reconfig(struct i40e_pf *pf,

			    struct i40e_dcbx_config *old_cfg,

			    struct i40e_dcbx_config *new_cfg);

#endif /* CONFIG_I40E_DCB */

void i40e_ptp_rx_hang(struct i40e_vsi *vsi);

void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);

void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);

drivers/net/ethernet/intel/i40e/i40e_common.c

+132 −13
Original line number Diff line number Diff line
@@ -42,20 +42,20 @@ static i40e_status i40e_set_mac_type(struct i40e_hw *hw) 


	if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {

		switch (hw->device_id) {

		case I40E_SFP_XL710_DEVICE_ID:

		case I40E_SFP_X710_DEVICE_ID:

		case I40E_QEMU_DEVICE_ID:

		case I40E_KX_A_DEVICE_ID:

		case I40E_KX_B_DEVICE_ID:

		case I40E_KX_C_DEVICE_ID:

		case I40E_KX_D_DEVICE_ID:

		case I40E_QSFP_A_DEVICE_ID:

		case I40E_QSFP_B_DEVICE_ID:

		case I40E_QSFP_C_DEVICE_ID:

		case I40E_DEV_ID_SFP_XL710:

		case I40E_DEV_ID_SFP_X710:

		case I40E_DEV_ID_QEMU:

		case I40E_DEV_ID_KX_A:

		case I40E_DEV_ID_KX_B:

		case I40E_DEV_ID_KX_C:

		case I40E_DEV_ID_KX_D:

		case I40E_DEV_ID_QSFP_A:

		case I40E_DEV_ID_QSFP_B:

		case I40E_DEV_ID_QSFP_C:

			hw->mac.type = I40E_MAC_XL710;

			break;

		case I40E_VF_DEVICE_ID:

		case I40E_VF_HV_DEVICE_ID:

		case I40E_DEV_ID_VF:

		case I40E_DEV_ID_VF_HV:

			hw->mac.type = I40E_MAC_VF;

			break;

		default:
@@ -1557,8 +1557,8 @@ i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw, 
				struct i40e_asq_cmd_details *cmd_details)

{

	struct i40e_aqc_list_capabilites *cmd;

	i40e_status status = 0;

	struct i40e_aq_desc desc;

	i40e_status status = 0;



	cmd = (struct i40e_aqc_list_capabilites *)&desc.params.raw;
@@ -1803,6 +1803,28 @@ i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid, 
	return status;

}



/**

 * i40e_aq_dcb_updated - DCB Updated Command

 * @hw: pointer to the hw struct

 * @cmd_details: pointer to command details structure or NULL

 *

 * EMP will return when the shared RPB settings have been

 * recomputed and modified. The retval field in the descriptor

 * will be set to 0 when RPB is modified.

 **/

i40e_status i40e_aq_dcb_updated(struct i40e_hw *hw,

				struct i40e_asq_cmd_details *cmd_details)

{

	struct i40e_aq_desc desc;

	i40e_status status;



	i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_dcb_updated);



	status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);



	return status;

}



/**

 * i40e_aq_tx_sched_cmd - generic Tx scheduler AQ command handler

 * @hw: pointer to the hw struct
@@ -1881,6 +1903,40 @@ i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw, 
				    cmd_details);

}



/**

 * i40e_aq_config_switch_comp_ets - Enable/Disable/Modify ETS on the port

 * @hw: pointer to the hw struct

 * @seid: seid of the switching component connected to Physical Port

 * @ets_data: Buffer holding ETS parameters

 * @cmd_details: pointer to command details structure or NULL

 **/

i40e_status i40e_aq_config_switch_comp_ets(struct i40e_hw *hw,

		u16 seid,

		struct i40e_aqc_configure_switching_comp_ets_data *ets_data,

		enum i40e_admin_queue_opc opcode,

		struct i40e_asq_cmd_details *cmd_details)

{

	return i40e_aq_tx_sched_cmd(hw, seid, (void *)ets_data,

				    sizeof(*ets_data), opcode, cmd_details);

}



/**

 * i40e_aq_config_switch_comp_bw_config - Config Switch comp BW Alloc per TC

 * @hw: pointer to the hw struct

 * @seid: seid of the switching component

 * @bw_data: Buffer holding enabled TCs, relative/absolute TC BW limit/credits

 * @cmd_details: pointer to command details structure or NULL

 **/

i40e_status i40e_aq_config_switch_comp_bw_config(struct i40e_hw *hw,

	u16 seid,

	struct i40e_aqc_configure_switching_comp_bw_config_data *bw_data,

	struct i40e_asq_cmd_details *cmd_details)

{

	return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),

			    i40e_aqc_opc_configure_switching_comp_bw_config,

			    cmd_details);

}



/**

 * i40e_aq_query_vsi_bw_config - Query VSI BW configuration

 * @hw: pointer to the hw struct
@@ -2134,6 +2190,69 @@ i40e_status i40e_set_filter_control(struct i40e_hw *hw, 


	return 0;

}



/**

 * i40e_aq_add_rem_control_packet_filter - Add or Remove Control Packet Filter

 * @hw: pointer to the hw struct

 * @mac_addr: MAC address to use in the filter

 * @ethtype: Ethertype to use in the filter

 * @flags: Flags that needs to be applied to the filter

 * @vsi_seid: seid of the control VSI

 * @queue: VSI queue number to send the packet to

 * @is_add: Add control packet filter if True else remove

 * @stats: Structure to hold information on control filter counts

 * @cmd_details: pointer to command details structure or NULL

 *

 * This command will Add or Remove control packet filter for a control VSI.

 * In return it will update the total number of perfect filter count in

 * the stats member.

 **/

i40e_status i40e_aq_add_rem_control_packet_filter(struct i40e_hw *hw,

				u8 *mac_addr, u16 ethtype, u16 flags,

				u16 vsi_seid, u16 queue, bool is_add,

				struct i40e_control_filter_stats *stats,

				struct i40e_asq_cmd_details *cmd_details)

{

	struct i40e_aq_desc desc;

	struct i40e_aqc_add_remove_control_packet_filter *cmd =

		(struct i40e_aqc_add_remove_control_packet_filter *)

		&desc.params.raw;

	struct i40e_aqc_add_remove_control_packet_filter_completion *resp =

		(struct i40e_aqc_add_remove_control_packet_filter_completion *)

		&desc.params.raw;

	i40e_status status;



	if (vsi_seid == 0)

		return I40E_ERR_PARAM;



	if (is_add) {

		i40e_fill_default_direct_cmd_desc(&desc,

				i40e_aqc_opc_add_control_packet_filter);

		cmd->queue = cpu_to_le16(queue);

	} else {

		i40e_fill_default_direct_cmd_desc(&desc,

				i40e_aqc_opc_remove_control_packet_filter);

	}



	if (mac_addr)

		memcpy(cmd->mac, mac_addr, ETH_ALEN);



	cmd->etype = cpu_to_le16(ethtype);

	cmd->flags = cpu_to_le16(flags);

	cmd->seid = cpu_to_le16(vsi_seid);



	status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);



	if (!status && stats) {

		stats->mac_etype_used = le16_to_cpu(resp->mac_etype_used);

		stats->etype_used = le16_to_cpu(resp->etype_used);

		stats->mac_etype_free = le16_to_cpu(resp->mac_etype_free);

		stats->etype_free = le16_to_cpu(resp->etype_free);

	}



	return status;

}



/**

 * i40e_set_pci_config_data - store PCI bus info

 * @hw: pointer to hardware structure

drivers/net/ethernet/intel/i40e/i40e_dcb.c

0 → 100644
+469 −0
Original line number Diff line number Diff line 
/*******************************************************************************

 *

 * Intel Ethernet Controller XL710 Family Linux Driver

 * Copyright(c) 2013 - 2014 Intel Corporation.

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 *

 * You should have received a copy of the GNU General Public License along

 * with this program.  If not, see <http://www.gnu.org/licenses/>.

 *

 * The full GNU General Public License is included in this distribution in

 * the file called "COPYING".

 *

 * Contact Information:

 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

 *

 ******************************************************************************/



#include "i40e_adminq.h"

#include "i40e_prototype.h"

#include "i40e_dcb.h"



/**

 * i40e_get_dcbx_status

 * @hw: pointer to the hw struct

 * @status: Embedded DCBX Engine Status

 *

 * Get the DCBX status from the Firmware

 **/

i40e_status i40e_get_dcbx_status(struct i40e_hw *hw, u16 *status)

{

	u32 reg;



	if (!status)

		return I40E_ERR_PARAM;



	reg = rd32(hw, I40E_PRTDCB_GENS);

	*status = (u16)((reg & I40E_PRTDCB_GENS_DCBX_STATUS_MASK) >>

			I40E_PRTDCB_GENS_DCBX_STATUS_SHIFT);



	return 0;

}



/**

 * i40e_parse_ieee_etscfg_tlv

 * @tlv: IEEE 802.1Qaz ETS CFG TLV

 * @dcbcfg: Local store to update ETS CFG data

 *

 * Parses IEEE 802.1Qaz ETS CFG TLV

 **/

static void i40e_parse_ieee_etscfg_tlv(struct i40e_lldp_org_tlv *tlv,

				       struct i40e_dcbx_config *dcbcfg)

{

	struct i40e_ieee_ets_config *etscfg;

	u8 *buf = tlv->tlvinfo;

	u16 offset = 0;

	u8 priority;

	int i;



	/* First Octet post subtype

	 * --------------------------

	 * |will-|CBS  | Re-  | Max |

	 * |ing  |     |served| TCs |

	 * --------------------------

	 * |1bit | 1bit|3 bits|3bits|

	 */

	etscfg = &dcbcfg->etscfg;

	etscfg->willing = (u8)((buf[offset] & I40E_IEEE_ETS_WILLING_MASK) >>

			       I40E_IEEE_ETS_WILLING_SHIFT);

	etscfg->cbs = (u8)((buf[offset] & I40E_IEEE_ETS_CBS_MASK) >>

			   I40E_IEEE_ETS_CBS_SHIFT);

	etscfg->maxtcs = (u8)((buf[offset] & I40E_IEEE_ETS_MAXTC_MASK) >>

			      I40E_IEEE_ETS_MAXTC_SHIFT);



	/* Move offset to Priority Assignment Table */

	offset++;



	/* Priority Assignment Table (4 octets)

	 * Octets:|    1    |    2    |    3    |    4    |

	 *        -----------------------------------------

	 *        |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|

	 *        -----------------------------------------

	 *   Bits:|7  4|3  0|7  4|3  0|7  4|3  0|7  4|3  0|

	 *        -----------------------------------------

	 */

	for (i = 0; i < 4; i++) {

		priority = (u8)((buf[offset] & I40E_IEEE_ETS_PRIO_1_MASK) >>

				I40E_IEEE_ETS_PRIO_1_SHIFT);

		etscfg->prioritytable[i * 2] =  priority;

		priority = (u8)((buf[offset] & I40E_IEEE_ETS_PRIO_0_MASK) >>

				I40E_IEEE_ETS_PRIO_0_SHIFT);

		etscfg->prioritytable[i * 2 + 1] = priority;

		offset++;

	}



	/* TC Bandwidth Table (8 octets)

	 * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |

	 *        ---------------------------------

	 *        |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|

	 *        ---------------------------------

	 */

	for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)

		etscfg->tcbwtable[i] = buf[offset++];



	/* TSA Assignment Table (8 octets)

	 * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |

	 *        ---------------------------------

	 *        |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|

	 *        ---------------------------------

	 */

	for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)

		etscfg->tsatable[i] = buf[offset++];

}



/**

 * i40e_parse_ieee_etsrec_tlv

 * @tlv: IEEE 802.1Qaz ETS REC TLV

 * @dcbcfg: Local store to update ETS REC data

 *

 * Parses IEEE 802.1Qaz ETS REC TLV

 **/

static void i40e_parse_ieee_etsrec_tlv(struct i40e_lldp_org_tlv *tlv,

				       struct i40e_dcbx_config *dcbcfg)

{

	u8 *buf = tlv->tlvinfo;

	u16 offset = 0;

	u8 priority;

	int i;



	/* Move offset to priority table */

	offset++;



	/* Priority Assignment Table (4 octets)

	 * Octets:|    1    |    2    |    3    |    4    |

	 *        -----------------------------------------

	 *        |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|

	 *        -----------------------------------------

	 *   Bits:|7  4|3  0|7  4|3  0|7  4|3  0|7  4|3  0|

	 *        -----------------------------------------

	 */

	for (i = 0; i < 4; i++) {

		priority = (u8)((buf[offset] & I40E_IEEE_ETS_PRIO_1_MASK) >>

				I40E_IEEE_ETS_PRIO_1_SHIFT);

		dcbcfg->etsrec.prioritytable[i*2] =  priority;

		priority = (u8)((buf[offset] & I40E_IEEE_ETS_PRIO_0_MASK) >>

				I40E_IEEE_ETS_PRIO_0_SHIFT);

		dcbcfg->etsrec.prioritytable[i*2 + 1] = priority;

		offset++;

	}



	/* TC Bandwidth Table (8 octets)

	 * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |

	 *        ---------------------------------

	 *        |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|

	 *        ---------------------------------

	 */

	for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)

		dcbcfg->etsrec.tcbwtable[i] = buf[offset++];



	/* TSA Assignment Table (8 octets)

	 * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |

	 *        ---------------------------------

	 *        |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|

	 *        ---------------------------------

	 */

	for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)

		dcbcfg->etsrec.tsatable[i] = buf[offset++];

}



/**

 * i40e_parse_ieee_pfccfg_tlv

 * @tlv: IEEE 802.1Qaz PFC CFG TLV

 * @dcbcfg: Local store to update PFC CFG data

 *

 * Parses IEEE 802.1Qaz PFC CFG TLV

 **/

static void i40e_parse_ieee_pfccfg_tlv(struct i40e_lldp_org_tlv *tlv,

				       struct i40e_dcbx_config *dcbcfg)

{

	u8 *buf = tlv->tlvinfo;



	/* ----------------------------------------

	 * |will-|MBC  | Re-  | PFC |  PFC Enable  |

	 * |ing  |     |served| cap |              |

	 * -----------------------------------------

	 * |1bit | 1bit|2 bits|4bits| 1 octet      |

	 */

	dcbcfg->pfc.willing = (u8)((buf[0] & I40E_IEEE_PFC_WILLING_MASK) >>

				   I40E_IEEE_PFC_WILLING_SHIFT);

	dcbcfg->pfc.mbc = (u8)((buf[0] & I40E_IEEE_PFC_MBC_MASK) >>

			       I40E_IEEE_PFC_MBC_SHIFT);

	dcbcfg->pfc.pfccap = (u8)((buf[0] & I40E_IEEE_PFC_CAP_MASK) >>

				  I40E_IEEE_PFC_CAP_SHIFT);

	dcbcfg->pfc.pfcenable = buf[1];

}



/**

 * i40e_parse_ieee_app_tlv

 * @tlv: IEEE 802.1Qaz APP TLV

 * @dcbcfg: Local store to update APP PRIO data

 *

 * Parses IEEE 802.1Qaz APP PRIO TLV

 **/

static void i40e_parse_ieee_app_tlv(struct i40e_lldp_org_tlv *tlv,

				    struct i40e_dcbx_config *dcbcfg)

{

	u16 typelength;

	u16 offset = 0;

	u16 length;

	int i = 0;

	u8 *buf;



	typelength = ntohs(tlv->typelength);

	length = (u16)((typelength & I40E_LLDP_TLV_LEN_MASK) >>

		       I40E_LLDP_TLV_LEN_SHIFT);

	buf = tlv->tlvinfo;



	/* The App priority table starts 5 octets after TLV header */

	length -= (sizeof(tlv->ouisubtype) + 1);



	/* Move offset to App Priority Table */

	offset++;



	/* Application Priority Table (3 octets)

	 * Octets:|         1          |    2    |    3    |

	 *        -----------------------------------------

	 *        |Priority|Rsrvd| Sel |    Protocol ID    |

	 *        -----------------------------------------

	 *   Bits:|23    21|20 19|18 16|15                0|

	 *        -----------------------------------------

	 */

	while (offset < length) {

		dcbcfg->app[i].priority = (u8)((buf[offset] &

						I40E_IEEE_APP_PRIO_MASK) >>

					       I40E_IEEE_APP_PRIO_SHIFT);

		dcbcfg->app[i].selector = (u8)((buf[offset] &

						I40E_IEEE_APP_SEL_MASK) >>

					       I40E_IEEE_APP_SEL_SHIFT);

		dcbcfg->app[i].protocolid = (buf[offset + 1] << 0x8) |

					     buf[offset + 2];

		/* Move to next app */

		offset += 3;

		i++;

		if (i >= I40E_DCBX_MAX_APPS)

			break;

	}



	dcbcfg->numapps = i;

}



/**

 * i40e_parse_ieee_etsrec_tlv

 * @tlv: IEEE 802.1Qaz TLV

 * @dcbcfg: Local store to update ETS REC data

 *

 * Get the TLV subtype and send it to parsing function

 * based on the subtype value

 **/

static void i40e_parse_ieee_tlv(struct i40e_lldp_org_tlv *tlv,

				struct i40e_dcbx_config *dcbcfg)

{

	u32 ouisubtype;

	u8 subtype;



	ouisubtype = ntohl(tlv->ouisubtype);

	subtype = (u8)((ouisubtype & I40E_LLDP_TLV_SUBTYPE_MASK) >>

		       I40E_LLDP_TLV_SUBTYPE_SHIFT);

	switch (subtype) {

	case I40E_IEEE_SUBTYPE_ETS_CFG:

		i40e_parse_ieee_etscfg_tlv(tlv, dcbcfg);

		break;

	case I40E_IEEE_SUBTYPE_ETS_REC:

		i40e_parse_ieee_etsrec_tlv(tlv, dcbcfg);

		break;

	case I40E_IEEE_SUBTYPE_PFC_CFG:

		i40e_parse_ieee_pfccfg_tlv(tlv, dcbcfg);

		break;

	case I40E_IEEE_SUBTYPE_APP_PRI:

		i40e_parse_ieee_app_tlv(tlv, dcbcfg);

		break;

	default:

		break;

	}

}



/**

 * i40e_parse_org_tlv

 * @tlv: Organization specific TLV

 * @dcbcfg: Local store to update ETS REC data

 *

 * Currently only IEEE 802.1Qaz TLV is supported, all others

 * will be returned

 **/

static void i40e_parse_org_tlv(struct i40e_lldp_org_tlv *tlv,

			       struct i40e_dcbx_config *dcbcfg)

{

	u32 ouisubtype;

	u32 oui;



	ouisubtype = ntohl(tlv->ouisubtype);

	oui = (u32)((ouisubtype & I40E_LLDP_TLV_OUI_MASK) >>

		    I40E_LLDP_TLV_OUI_SHIFT);

	switch (oui) {

	case I40E_IEEE_8021QAZ_OUI:

		i40e_parse_ieee_tlv(tlv, dcbcfg);

		break;

	default:

		break;

	}

}



/**

 * i40e_lldp_to_dcb_config

 * @lldpmib: LLDPDU to be parsed

 * @dcbcfg: store for LLDPDU data

 *

 * Parse DCB configuration from the LLDPDU

 **/

i40e_status i40e_lldp_to_dcb_config(u8 *lldpmib,

				    struct i40e_dcbx_config *dcbcfg)

{

	i40e_status ret = 0;

	struct i40e_lldp_org_tlv *tlv;

	u16 type;

	u16 length;

	u16 typelength;



	if (!lldpmib || !dcbcfg)

		return I40E_ERR_PARAM;



	/* set to the start of LLDPDU */

	lldpmib += ETH_HLEN;

	tlv = (struct i40e_lldp_org_tlv *)lldpmib;

	while (tlv) {

		typelength = ntohs(tlv->typelength);

		type = (u16)((typelength & I40E_LLDP_TLV_TYPE_MASK) >>

			     I40E_LLDP_TLV_TYPE_SHIFT);

		length = (u16)((typelength & I40E_LLDP_TLV_LEN_MASK) >>

			       I40E_LLDP_TLV_LEN_SHIFT);



		if (type == I40E_TLV_TYPE_END)

			break;/* END TLV break out */



		switch (type) {

		case I40E_TLV_TYPE_ORG:

			i40e_parse_org_tlv(tlv, dcbcfg);

			break;

		default:

			break;

		}



		/* Move to next TLV */

		tlv = (struct i40e_lldp_org_tlv *)((char *)tlv +

						    sizeof(tlv->typelength) +

						    length);

	}



	return ret;

}



/**

 * i40e_aq_get_dcb_config

 * @hw: pointer to the hw struct

 * @mib_type: mib type for the query

 * @bridgetype: bridge type for the query (remote)

 * @dcbcfg: store for LLDPDU data

 *

 * Query DCB configuration from the Firmware

 **/

i40e_status i40e_aq_get_dcb_config(struct i40e_hw *hw, u8 mib_type,

				   u8 bridgetype,

				   struct i40e_dcbx_config *dcbcfg)

{

	i40e_status ret = 0;

	struct i40e_virt_mem mem;

	u8 *lldpmib;



	/* Allocate the LLDPDU */

	ret = i40e_allocate_virt_mem(hw, &mem, I40E_LLDPDU_SIZE);

	if (ret)

		return ret;



	lldpmib = (u8 *)mem.va;

	ret = i40e_aq_get_lldp_mib(hw, bridgetype, mib_type,

				   (void *)lldpmib, I40E_LLDPDU_SIZE,

				   NULL, NULL, NULL);

	if (ret)

		goto free_mem;



	/* Parse LLDP MIB to get dcb configuration */

	ret = i40e_lldp_to_dcb_config(lldpmib, dcbcfg);



free_mem:

	i40e_free_virt_mem(hw, &mem);

	return ret;

}



/**

 * i40e_get_dcb_config

 * @hw: pointer to the hw struct

 *

 * Get DCB configuration from the Firmware

 **/

i40e_status i40e_get_dcb_config(struct i40e_hw *hw)

{

	i40e_status ret = 0;



	/* Get Local DCB Config */

	ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_LOCAL, 0,

				     &hw->local_dcbx_config);

	if (ret)

		goto out;



	/* Get Remote DCB Config */

	ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,

				     I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,

				     &hw->remote_dcbx_config);

out:

	return ret;

}



/**

 * i40e_init_dcb

 * @hw: pointer to the hw struct

 *

 * Update DCB configuration from the Firmware

 **/

i40e_status i40e_init_dcb(struct i40e_hw *hw)

{

	i40e_status ret = 0;



	if (!hw->func_caps.dcb)

		return ret;



	/* Get DCBX status */

	ret = i40e_get_dcbx_status(hw, &hw->dcbx_status);

	if (ret)

		return ret;



	/* Check the DCBX Status */

	switch (hw->dcbx_status) {

	case I40E_DCBX_STATUS_DONE:

	case I40E_DCBX_STATUS_IN_PROGRESS:

		/* Get current DCBX configuration */

		ret = i40e_get_dcb_config(hw);

		break;

	case I40E_DCBX_STATUS_DISABLED:

		return ret;

	case I40E_DCBX_STATUS_NOT_STARTED:

	case I40E_DCBX_STATUS_MULTIPLE_PEERS:

	default:

		break;

	}



	/* Configure the LLDP MIB change event */

	ret = i40e_aq_cfg_lldp_mib_change_event(hw, true, NULL);

	if (ret)

		return ret;



	return ret;

}

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