Commit 13bbd8d9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (25 commits)
  [POWERPC] Add support for the mpc832x mds board
  [POWERPC] Add initial support for the e300c2 core
  [POWERPC] Add MPC8360EMDS default dts file
  [POWERPC] Add MPC8360EMDS board support
  [POWERPC] Add QUICC Engine (QE) infrastructure
  [POWERPC] Add QE device tree node definition
  [POWERPC] Don't try to just continue if xmon has no input device
  [POWERPC] Fix a printk in pseries_mpic_init_IRQ
  [POWERPC] Get default baud rate in udbg_scc
  [POWERPC] Fix zImage.coff on oldworld PowerMac
  [POWERPC] Fix xmon=off and cleanup xmon initialisation
  [POWERPC] Cleanup include/asm-powerpc/xmon.h
  [POWERPC] Update swim3 printk after blkdev.h change
  [POWERPC] Cell interrupt rework
  POWERPC: mpc82xx merge: board-specific/platform stuff(resend)
  POWERPC: 8272ads merge to powerpc: common stuff
  POWERPC: Added devicetree for mpc8272ads board
  [POWERPC] iSeries has no legacy I/O
  [POWERPC] implement BEGIN/END_FW_FTR_SECTION
  [POWERPC] iSeries does not need pcibios_fixup_resources
  ...
parents 18e6756a 9020fc96
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@@ -1440,6 +1440,258 @@ platforms are moved over to use the flattened-device-tree model.
               descriptor-types-mask = <012b0ebf>;
       };

   h) Board Control and Status (BCSR)

   Required properties:

    - device_type : Should be "board-control"
    - reg : Offset and length of the register set for the device

    Example:

	bcsr@f8000000 {
		device_type = "board-control";
		reg = <f8000000 8000>;
	};

   i) Freescale QUICC Engine module (QE)
   This represents qe module that is installed on PowerQUICC II Pro.
   Hopefully it will merge backward compatibility with CPM/CPM2.
   Basically, it is a bus of devices, that could act more or less
   as a complete entity (UCC, USB etc ). All of them should be siblings on
   the "root" qe node, using the common properties from there.
   The description below applies to the the qe of MPC8360 and
   more nodes and properties would be extended in the future.

   i) Root QE device

   Required properties:
   - device_type : should be "qe";
   - model : precise model of the QE, Can be "QE", "CPM", or "CPM2"
   - reg : offset and length of the device registers.
   - bus-frequency : the clock frequency for QUICC Engine.

   Recommended properties
   - brg-frequency : the internal clock source frequency for baud-rate
     generators in Hz.

   Example:
	qe@e0100000 {
		#address-cells = <1>;
		#size-cells = <1>;
		#interrupt-cells = <2>;
		device_type = "qe";
		model = "QE";
		ranges = <0 e0100000 00100000>;
		reg = <e0100000 480>;
		brg-frequency = <0>;
		bus-frequency = <179A7B00>;
	}


   ii) SPI (Serial Peripheral Interface)

   Required properties:
   - device_type : should be "spi".
   - compatible : should be "fsl_spi".
   - mode : the spi operation mode, it can be "cpu" or "qe".
   - reg : Offset and length of the register set for the device
   - interrupts : <a b> where a is the interrupt number and b is a
     field that represents an encoding of the sense and level
     information for the interrupt.  This should be encoded based on
     the information in section 2) depending on the type of interrupt
     controller you have.
   - interrupt-parent : the phandle for the interrupt controller that
     services interrupts for this device.

   Example:
	spi@4c0 {
		device_type = "spi";
		compatible = "fsl_spi";
		reg = <4c0 40>;
		interrupts = <82 0>;
		interrupt-parent = <700>;
		mode = "cpu";
	};


   iii) USB (Universal Serial Bus Controller)

   Required properties:
   - device_type : should be "usb".
   - compatible : could be "qe_udc" or "fhci-hcd".
   - mode : the could be "host" or "slave".
   - reg : Offset and length of the register set for the device
   - interrupts : <a b> where a is the interrupt number and b is a
     field that represents an encoding of the sense and level
     information for the interrupt.  This should be encoded based on
     the information in section 2) depending on the type of interrupt
     controller you have.
   - interrupt-parent : the phandle for the interrupt controller that
     services interrupts for this device.

   Example(slave):
	usb@6c0 {
		device_type = "usb";
		compatible = "qe_udc";
		reg = <6c0 40>;
		interrupts = <8b 0>;
		interrupt-parent = <700>;
		mode = "slave";
	};


   iv) UCC (Unified Communications Controllers)

   Required properties:
   - device_type : should be "network", "hldc", "uart", "transparent"
    "bisync" or "atm".
   - compatible : could be "ucc_geth" or "fsl_atm" and so on.
   - model : should be "UCC".
   - device-id : the ucc number(1-8), corresponding to UCCx in UM.
   - reg : Offset and length of the register set for the device
   - interrupts : <a b> where a is the interrupt number and b is a
     field that represents an encoding of the sense and level
     information for the interrupt.  This should be encoded based on
     the information in section 2) depending on the type of interrupt
     controller you have.
   - interrupt-parent : the phandle for the interrupt controller that
     services interrupts for this device.
   - pio-handle : The phandle for the Parallel I/O port configuration.
   - rx-clock : represents the UCC receive clock source.
     0x00 : clock source is disabled;
     0x1~0x10 : clock source is BRG1~BRG16 respectively;
     0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
   - tx-clock: represents the UCC transmit clock source;
     0x00 : clock source is disabled;
     0x1~0x10 : clock source is BRG1~BRG16 respectively;
     0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.

   Required properties for network device_type:
   - mac-address : list of bytes representing the ethernet address.
   - phy-handle : The phandle for the PHY connected to this controller.

   Example:
	ucc@2000 {
		device_type = "network";
		compatible = "ucc_geth";
		model = "UCC";
		device-id = <1>;
		reg = <2000 200>;
		interrupts = <a0 0>;
		interrupt-parent = <700>;
		mac-address = [ 00 04 9f 00 23 23 ];
		rx-clock = "none";
		tx-clock = "clk9";
		phy-handle = <212000>;
		pio-handle = <140001>;
	};


   v) Parallel I/O Ports

   This node configures Parallel I/O ports for CPUs with QE support.
   The node should reside in the "soc" node of the tree.  For each
   device that using parallel I/O ports, a child node should be created.
   See the definition of the Pin configuration nodes below for more
   information.

   Required properties:
   - device_type : should be "par_io".
   - reg : offset to the register set and its length.
   - num-ports : number of Parallel I/O ports

   Example:
	par_io@1400 {
		reg = <1400 100>;
		#address-cells = <1>;
		#size-cells = <0>;
		device_type = "par_io";
		num-ports = <7>;
		ucc_pin@01 {
			......
		};


   vi) Pin configuration nodes

   Required properties:
   - linux,phandle : phandle of this node; likely referenced by a QE
     device.
   - pio-map : array of pin configurations.  Each pin is defined by 6
     integers.  The six numbers are respectively: port, pin, dir,
     open_drain, assignment, has_irq.
     - port : port number of the pin; 0-6 represent port A-G in UM.
     - pin : pin number in the port.
     - dir : direction of the pin, should encode as follows:

	0 = The pin is disabled
	1 = The pin is an output
	2 = The pin is an input
	3 = The pin is I/O

     - open_drain : indicates the pin is normal or wired-OR:

	0 = The pin is actively driven as an output
	1 = The pin is an open-drain driver. As an output, the pin is
	    driven active-low, otherwise it is three-stated.

     - assignment : function number of the pin according to the Pin Assignment
       tables in User Manual.  Each pin can have up to 4 possible functions in
       QE and two options for CPM.
     - has_irq : indicates if the pin is used as source of exteral
       interrupts.

   Example:
	ucc_pin@01 {
		linux,phandle = <140001>;
		pio-map = <
		/* port  pin  dir  open_drain  assignment  has_irq */
			0  3  1  0  1  0 	/* TxD0 */
			0  4  1  0  1  0 	/* TxD1 */
			0  5  1  0  1  0 	/* TxD2 */
			0  6  1  0  1  0 	/* TxD3 */
			1  6  1  0  3  0 	/* TxD4 */
			1  7  1  0  1  0 	/* TxD5 */
			1  9  1  0  2  0 	/* TxD6 */
			1  a  1  0  2  0 	/* TxD7 */
			0  9  2  0  1  0 	/* RxD0 */
			0  a  2  0  1  0 	/* RxD1 */
			0  b  2  0  1  0 	/* RxD2 */
			0  c  2  0  1  0 	/* RxD3 */
			0  d  2  0  1  0 	/* RxD4 */
			1  1  2  0  2  0 	/* RxD5 */
			1  0  2  0  2  0 	/* RxD6 */
			1  4  2  0  2  0 	/* RxD7 */
			0  7  1  0  1  0 	/* TX_EN */
			0  8  1  0  1  0 	/* TX_ER */
			0  f  2  0  1  0 	/* RX_DV */
			0  10 2  0  1  0 	/* RX_ER */
			0  0  2  0  1  0 	/* RX_CLK */
			2  9  1  0  3  0 	/* GTX_CLK - CLK10 */
			2  8  2  0  1  0>;	/* GTX125 - CLK9 */
	};

   vii) Multi-User RAM (MURAM)

   Required properties:
   - device_type : should be "muram".
   - mode : the could be "host" or "slave".
   - ranges : Should be defined as specified in 1) to describe the
      translation of MURAM addresses.
   - data-only : sub-node which defines the address area under MURAM
      bus that can be allocated as data/parameter

   Example:

	muram@10000 {
		device_type = "muram";
		ranges = <0 00010000 0000c000>;

		data-only@0{
			reg = <0 c000>;
		};
	};

   More devices will be defined as this spec matures.

+17 −4
Original line number Diff line number Diff line
@@ -338,10 +338,6 @@ config PPC_MULTIPLATFORM
	  RS/6000 machine, an Apple machine, or a PReP, CHRP,
	  Maple or Cell-based machine.

config PPC_ISERIES
	bool "IBM Legacy iSeries"
	depends on PPC64

config EMBEDDED6xx
	bool "Embedded 6xx/7xx/7xxx-based board"
	depends on PPC32 && (BROKEN||BROKEN_ON_SMP)
@@ -355,6 +351,16 @@ config APUS
	  <http://linux-apus.sourceforge.net/>.
endchoice

config QUICC_ENGINE
	bool
	depends on PPC_MPC836x || PPC_MPC832x
	default y
	help
	  The QUICC Engine (QE) is a new generation of communications
	  coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
	  Selecting this option means that you wish to build a kernel
	  for a machine with a QE coprocessor.

config PPC_PSERIES
	depends on PPC_MULTIPLATFORM && PPC64
	bool "IBM pSeries & new (POWER5-based) iSeries"
@@ -365,6 +371,10 @@ config PPC_PSERIES
	select PPC_UDBG_16550
	default y

config PPC_ISERIES
	bool "IBM Legacy iSeries"
	depends on PPC_MULTIPLATFORM && PPC64

config PPC_CHRP
	bool "Common Hardware Reference Platform (CHRP) based machines"
	depends on PPC_MULTIPLATFORM && PPC32
@@ -594,6 +604,7 @@ endmenu

source arch/powerpc/platforms/embedded6xx/Kconfig
source arch/powerpc/platforms/4xx/Kconfig
source arch/powerpc/platforms/82xx/Kconfig
source arch/powerpc/platforms/83xx/Kconfig
source arch/powerpc/platforms/85xx/Kconfig
source arch/powerpc/platforms/86xx/Kconfig
@@ -1058,6 +1069,8 @@ source "fs/Kconfig"

# XXX source "arch/ppc/8260_io/Kconfig"

source "arch/powerpc/sysdev/qe_lib/Kconfig"

source "arch/powerpc/platforms/iseries/Kconfig"

source "lib/Kconfig"
+223 −0
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/*
 * MPC8272 ADS Device Tree Source
 *
 * Copyright 2005 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/ {
       model = "MPC8272ADS";
       compatible = "MPC8260ADS";
       #address-cells = <1>;
       #size-cells = <1>;
       linux,phandle = <100>;

       cpus {
               #cpus = <1>;
               #address-cells = <1>;
               #size-cells = <0>;
               linux,phandle = <200>;

               PowerPC,8272@0 {
                       device_type = "cpu";
                       reg = <0>;
                       d-cache-line-size = <20>;       // 32 bytes
                       i-cache-line-size = <20>;       // 32 bytes
                       d-cache-size = <4000>;          // L1, 16K
                       i-cache-size = <4000>;          // L1, 16K
                       timebase-frequency = <0>;
                       bus-frequency = <0>;
                       clock-frequency = <0>;
                       32-bit;
                       linux,phandle = <201>;
                       linux,boot-cpu;
               };
       };

       interrupt-controller@f8200000 {
               linux,phandle = <f8200000>;
               #address-cells = <0>;
               #interrupt-cells = <2>;
               interrupt-controller;
               reg = <f8200000 f8200004>;
               built-in;
               device_type = "pci-pic";
       };
       memory {
               device_type = "memory";
               linux,phandle = <300>;
               reg = <00000000 4000000 f4500000 00000020>;
       };

       soc8272@f0000000 {
               #address-cells = <1>;
               #size-cells = <1>;
               #interrupt-cells = <2>;
               device_type = "soc";
               ranges = < 0 0 2 00000000 f0000000 00053000>;
               reg = <f0000000 0>;

               mdio@0 {
                       device_type = "mdio";
                       compatible = "fs_enet";
                       reg = <0 0>;
                       linux,phandle = <24520>;
                       #address-cells = <1>;
                       #size-cells = <0>;
                       ethernet-phy@0 {
                               linux,phandle = <2452000>;
                               interrupt-parent = <10c00>;
                               interrupts = <19 1>;
                               reg = <0>;
                               bitbang = [ 12 12 13 02 02 01 ];
                               device_type = "ethernet-phy";
                       };
                       ethernet-phy@1 {
                               linux,phandle = <2452001>;
                               interrupt-parent = <10c00>;
                               interrupts = <19 1>;
                               bitbang = [ 12 12 13 02 02 01 ];
                               reg = <3>;
                               device_type = "ethernet-phy";
                       };
               };

               ethernet@24000 {
                       #address-cells = <1>;
                       #size-cells = <0>;
                       device_type = "network";
                       device-id = <2>;
                       compatible = "fs_enet";
                       model = "FCC";
                       reg = <11300 20 8400 100 11380 30>;
                       mac-address = [ 00 11 2F 99 43 54 ];
                       interrupts = <20 2>;
                       interrupt-parent = <10c00>;
                       phy-handle = <2452000>;
                       rx-clock = <13>;
                       tx-clock = <12>;
               };

               ethernet@25000 {
                       device_type = "network";
                       device-id = <3>;
                       compatible = "fs_enet";
                       model = "FCC";
                       reg = <11320 20 8500 100 113b0 30>;
                       mac-address = [ 00 11 2F 99 44 54 ];
                       interrupts = <21 2>;
                       interrupt-parent = <10c00>;
                       phy-handle = <2452001>;
                       rx-clock = <17>;
                       tx-clock = <18>;
               };

               cpm@f0000000 {
                       linux,phandle = <f0000000>;
                       #address-cells = <1>;
                       #size-cells = <1>;
                       #interrupt-cells = <2>;
                       device_type = "cpm";
                       model = "CPM2";
                       ranges = <00000000 00000000 3ffff>;
                       reg = <10d80 3280>;
                       command-proc = <119c0>;
                       brg-frequency = <17D7840>;
                       cpm_clk = <BEBC200>;

                       scc@11a00 {
                               device_type = "serial";
                               compatible = "cpm_uart";
                               model = "SCC";
                               device-id = <2>;
                               reg = <11a00 20 8000 100>;
                               current-speed = <1c200>;
                               interrupts = <28 2>;
                               interrupt-parent = <10c00>;
                               clock-setup = <0 00ffffff>;
                               rx-clock = <1>;
                               tx-clock = <1>;
                       };

                       scc@11a60 {
                               device_type = "serial";
                               compatible = "cpm_uart";
                               model = "SCC";
                               device-id = <5>;
                               reg = <11a60 20 8300 100>;
                               current-speed = <1c200>;
                               interrupts = <2b 2>;
                               interrupt-parent = <10c00>;
                               clock-setup = <1b ffffff00>;
                               rx-clock = <4>;
                               tx-clock = <4>;
                       };

               };
               interrupt-controller@10c00 {
                       linux,phandle = <10c00>;
                       #address-cells = <0>;
                       #interrupt-cells = <2>;
                       interrupt-controller;
                       reg = <10c00 80>;
                       built-in;
                       device_type = "cpm-pic";
		       compatible = "CPM2";
               };
               pci@0500 {
                       linux,phandle = <0500>;
                       #interrupt-cells = <1>;
                       #size-cells = <2>;
                       #address-cells = <3>;
                       compatible = "8272";
                       device_type = "pci";
                       reg = <10430 4dc>;
                       clock-frequency = <3f940aa>;
                       interrupt-map-mask = <f800 0 0 7>;
                       interrupt-map = <

                                       /* IDSEL 0x16 */
                                        b000 0 0 1 f8200000 40 0
                                        b000 0 0 2 f8200000 41 0
                                        b000 0 0 3 f8200000 42 0
                                        b000 0 0 4 f8200000 43 0

                                       /* IDSEL 0x17 */
                                        b800 0 0 1 f8200000 43 0
                                        b800 0 0 2 f8200000 40 0
                                        b800 0 0 3 f8200000 41 0
                                        b800 0 0 4 f8200000 42 0

                                       /* IDSEL 0x18 */
                                        c000 0 0 1 f8200000 42 0
                                        c000 0 0 2 f8200000 43 0
                                        c000 0 0 3 f8200000 40 0
                                        c000 0 0 4 f8200000 41 0>;
                       interrupt-parent = <10c00>;
                       interrupts = <14 3>;
                       bus-range = <0 0>;
                       ranges = <02000000 0 80000000 80000000 0 40000000
                                 01000000 0 00000000 f6000000 0 02000000>;
               };

/* May need to remove if on a part without crypto engine */
               crypto@30000 {
                       device_type = "crypto";
                       model = "SEC2";
                       compatible = "talitos";
                       reg = <30000 10000>;
                       interrupts = <b 0>;
                       interrupt-parent = <10c00>;
                       num-channels = <4>;
                       channel-fifo-len = <18>;
                       exec-units-mask = <0000007e>;
/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
                       descriptor-types-mask = <01010ebf>;
               };

       };
};
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@@ -15,6 +15,7 @@ SECTIONS
  {
    *(.rodata*)
    *(.data*)
    *(__builtin_*)
    *(.sdata*)
    __got2_start = .;
    *(.got2)
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