Unverified Commit 13a96935 authored by Jon Lin's avatar Jon Lin Committed by Mark Brown
Browse files

spi: rockchip: Support 64-location deep FIFOs



The FIFO depth of SPI V2 is 64 instead of 32, add support for it.

Signed-off-by: default avatarJon Lin <jon.lin@rock-chips.com>
Tested-by: default avatarEmil Renner Berthing <kernel@esmil.dk>
Reviewed-by: default avatarEmil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20200723004356.6390-2-jon.lin@rock-chips.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 4d9ca632
Loading
Loading
Loading
Loading
+14 −11
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@
#define ROCKCHIP_SPI_DMACR			0x003c
#define ROCKCHIP_SPI_DMATDLR			0x0040
#define ROCKCHIP_SPI_DMARDLR			0x0044
#define ROCKCHIP_SPI_VERSION			0x0048
#define ROCKCHIP_SPI_TXDR			0x0400
#define ROCKCHIP_SPI_RXDR			0x0800

@@ -156,6 +157,8 @@
#define ROCKCHIP_SPI_MAX_TRANLEN		0xffff

#define ROCKCHIP_SPI_MAX_CS_NUM			2
#define ROCKCHIP_SPI_VER2_TYPE1			0x05EC0002
#define ROCKCHIP_SPI_VER2_TYPE2			0x00110002

struct rockchip_spi {
	struct device *dev;
@@ -206,17 +209,17 @@ static inline void wait_for_idle(struct rockchip_spi *rs)

static u32 get_fifo_len(struct rockchip_spi *rs)
{
	u32 fifo;
	u32 ver;

	for (fifo = 2; fifo < 32; fifo++) {
		writel_relaxed(fifo, rs->regs + ROCKCHIP_SPI_TXFTLR);
		if (fifo != readl_relaxed(rs->regs + ROCKCHIP_SPI_TXFTLR))
			break;
	}

	writel_relaxed(0, rs->regs + ROCKCHIP_SPI_TXFTLR);
	ver = readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION);

	return (fifo == 31) ? 0 : fifo;
	switch (ver) {
	case ROCKCHIP_SPI_VER2_TYPE1:
	case ROCKCHIP_SPI_VER2_TYPE2:
		return 64;
	default:
		return 32;
	}
}

static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)