Commit 1374a22e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2019-08-23' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
 "Live from the laundromat after my washing machine broke down, we have
  the 5.3-rc6 fixes. Changelog is in the tag below, but nothing too
  noteworthy in here:

  rcar-du:
   - LVDS dual-link mode fix

  mediatek:
   - of node refcount fix
   - prime buffer import fix
   - dma max seg fix

  komeda:
   - output polling fix
   - abfc format fix
   - memory-region DT fix

  amdgpu:
   - bpc display fix
   - ioctl memory leak fix
   - gfxoff fix
   - smu warnings fix

  i915:
   - HDMI mode readout fix"

* tag 'drm-fixes-2019-08-23' of git://anongit.freedesktop.org/drm/drm:
  drm/amdgpu/powerplay: silence a warning in smu_v11_0_setup_pptable
  drm/amd/display: Calculate bpc based on max_requested_bpc
  drm/amdgpu: prevent memory leaks in AMDGPU_CS ioctl
  drm/amd/amdgpu: disable MMHUB PG for navi10
  drm/amd/powerplay: remove duplicate macro smu_get_uclk_dpm_states in amdgpu_smu.h
  drm/amd/powerplay: fix variable type errors in smu_v11_0_setup_pptable
  drm/amdgpu/gfx9: update pg_flags after determining if gfx off is possible
  drm/i915: Fix HW readout for crtc_clock in HDMI mode
  drm/mediatek: mtk_drm_drv.c: Add of_node_put() before goto
  drm: rcar_lvds: Fix dual link mode operations
  drm/mediatek: set DMA max segment size
  drm/mediatek: use correct device to import PRIME buffers
  drm/omap: ensure we have a valid dma_mask
  drm/komeda: Add support for 'memory-region' DT node property
  drm/komeda: Adds internal bpp computing for arm afbc only format YU08 YU10
  drm/komeda: Initialize and enable output polling on Komeda
parents 59c36bc8 75710f08
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+7 −2
Original line number Diff line number Diff line
@@ -1143,6 +1143,9 @@ static int amdgpu_cs_process_syncobj_out_dep(struct amdgpu_cs_parser *p,
	num_deps = chunk->length_dw * 4 /
		sizeof(struct drm_amdgpu_cs_chunk_sem);

	if (p->post_deps)
		return -EINVAL;

	p->post_deps = kmalloc_array(num_deps, sizeof(*p->post_deps),
				     GFP_KERNEL);
	p->num_post_deps = 0;
@@ -1166,8 +1169,7 @@ static int amdgpu_cs_process_syncobj_out_dep(struct amdgpu_cs_parser *p,


static int amdgpu_cs_process_syncobj_timeline_out_dep(struct amdgpu_cs_parser *p,
						      struct amdgpu_cs_chunk
						      *chunk)
						      struct amdgpu_cs_chunk *chunk)
{
	struct drm_amdgpu_cs_chunk_syncobj *syncobj_deps;
	unsigned num_deps;
@@ -1177,6 +1179,9 @@ static int amdgpu_cs_process_syncobj_timeline_out_dep(struct amdgpu_cs_parser *p
	num_deps = chunk->length_dw * 4 /
		sizeof(struct drm_amdgpu_cs_chunk_syncobj);

	if (p->post_deps)
		return -EINVAL;

	p->post_deps = kmalloc_array(num_deps, sizeof(*p->post_deps),
				     GFP_KERNEL);
	p->num_post_deps = 0;
+4 −0
Original line number Diff line number Diff line
@@ -604,6 +604,10 @@ static void gfx_v9_0_check_if_need_gfxoff(struct amdgpu_device *adev)
		    (adev->gfx.rlc_feature_version < 1) ||
		    !adev->gfx.rlc.is_rlc_v2_1)
			adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
		if (adev->pm.pp_feature & PP_GFXOFF_MASK)
			adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG |
				AMD_PG_SUPPORT_CP |
				AMD_PG_SUPPORT_RLC_SMU_HS;
		break;
	default:
		break;
+0 −1
Original line number Diff line number Diff line
@@ -552,7 +552,6 @@ static int nv_common_early_init(void *handle)
			AMD_CG_SUPPORT_BIF_LS;
		adev->pg_flags = AMD_PG_SUPPORT_VCN |
			AMD_PG_SUPPORT_VCN_DPG |
			AMD_PG_SUPPORT_MMHUB |
			AMD_PG_SUPPORT_ATHUB;
		adev->external_rev_id = adev->rev_id + 0x1;
		break;
+0 −5
Original line number Diff line number Diff line
@@ -992,11 +992,6 @@ static int soc15_common_early_init(void *handle)

			adev->pg_flags = AMD_PG_SUPPORT_SDMA | AMD_PG_SUPPORT_VCN;
		}

		if (adev->pm.pp_feature & PP_GFXOFF_MASK)
			adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG |
				AMD_PG_SUPPORT_CP |
				AMD_PG_SUPPORT_RLC_SMU_HS;
		break;
	default:
		/* FIXME: not supported yet */
+14 −2
Original line number Diff line number Diff line
@@ -3131,13 +3131,25 @@ static enum dc_color_depth
convert_color_depth_from_display_info(const struct drm_connector *connector,
				      const struct drm_connector_state *state)
{
	uint32_t bpc = connector->display_info.bpc;
	uint8_t bpc = (uint8_t)connector->display_info.bpc;

	/* Assume 8 bpc by default if no bpc is specified. */
	bpc = bpc ? bpc : 8;

	if (!state)
		state = connector->state;

	if (state) {
		bpc = state->max_bpc;
		/*
		 * Cap display bpc based on the user requested value.
		 *
		 * The value for state->max_bpc may not correctly updated
		 * depending on when the connector gets added to the state
		 * or if this was called outside of atomic check, so it
		 * can't be used directly.
		 */
		bpc = min(bpc, state->max_requested_bpc);

		/* Round down to the nearest even number. */
		bpc = bpc - (bpc & 1);
	}
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