Commit 134764ed authored by Aravinda Prasad's avatar Aravinda Prasad Committed by Paul Mackerras
Browse files

KVM: PPC: Book3S HV: Add new capability to control MCE behaviour 



This introduces a new KVM capability to control how KVM behaves
on machine check exception (MCE) in HV KVM guests.

If this capability has not been enabled, KVM redirects machine check
exceptions to guest's 0x200 vector, if the address in error belongs to
the guest. With this capability enabled, KVM will cause a guest exit
with the exit reason indicating an NMI.

The new capability is required to avoid problems if a new kernel/KVM
is used with an old QEMU, running a guest that doesn't issue
"ibm,nmi-register".  As old QEMU does not understand the NMI exit
type, it treats it as a fatal error.  However, the guest could have
handled the machine check error if the exception was delivered to
guest's 0x200 interrupt vector instead of NMI exit in case of old
QEMU.

[paulus@ozlabs.org - Reworded the commit message to be clearer,
 enable only on HV KVM.]

Signed-off-by: default avatarAravinda Prasad <aravinda@linux.vnet.ibm.com>
Reviewed-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: default avatarPaul Mackerras <paulus@ozlabs.org>
parent ee3308a2

Documentation/virtual/kvm/api.txt

+11 −0
Original line number Diff line number Diff line
@@ -4011,6 +4011,17 @@ vsmt_mode being returned when the KVM_CAP_PPC_SMT capability is 
subsequently queried for the VM.  This capability is only supported by

HV KVM, and can only be set before any VCPUs have been created.



7.12 KVM_CAP_PPC_FWNMI



Architectures: ppc

Parameters: none



With this capability a machine check exception in the guest address

space will cause KVM to exit the guest with NMI exit reason. This

enables QEMU to build error log and branch to guest kernel registered

machine check handling routine. Without this capability KVM will

branch to guests' 0x200 interrupt vector.



8. Other capabilities.

----------------------

arch/powerpc/include/asm/kvm_host.h

+1 −0
Original line number Diff line number Diff line
@@ -287,6 +287,7 @@ struct kvm_arch { 
	cpumask_t need_tlb_flush;

	cpumask_t cpu_in_guest;

	u8 radix;

	u8 fwnmi_enabled;

	pgd_t *pgtable;

	u64 process_table;

	struct dentry *debugfs_dir;

arch/powerpc/kernel/asm-offsets.c

+1 −0
Original line number Diff line number Diff line
@@ -485,6 +485,7 @@ int main(void) 
	OFFSET(KVM_ENABLED_HCALLS, kvm, arch.enabled_hcalls);

	OFFSET(KVM_VRMA_SLB_V, kvm, arch.vrma_slb_v);

	OFFSET(KVM_RADIX, kvm, arch.radix);

	OFFSET(KVM_FWNMI, kvm, arch.fwnmi_enabled);

	OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr);

	OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar);

	OFFSET(VCPU_VPA, kvm_vcpu, arch.vpa.pinned_addr);

arch/powerpc/kvm/powerpc.c

+14 −0
Original line number Diff line number Diff line
@@ -623,6 +623,11 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) 
		/* Disable this on POWER9 until code handles new HPTE format */

		r = !!hv_enabled && !cpu_has_feature(CPU_FTR_ARCH_300);

		break;

#endif

#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE

	case KVM_CAP_PPC_FWNMI:

		r = hv_enabled;

		break;

#endif

	case KVM_CAP_PPC_HTM:

		r = cpu_has_feature(CPU_FTR_TM_COMP) &&
@@ -1543,6 +1548,15 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu, 
		break;

	}

#endif /* CONFIG_KVM_XICS */

#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE

	case KVM_CAP_PPC_FWNMI:

		r = -EINVAL;

		if (!is_kvmppc_hv_enabled(vcpu->kvm))

			break;

		r = 0;

		vcpu->kvm->arch.fwnmi_enabled = true;

		break;

#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */

	default:

		r = -EINVAL;

		break;

include/uapi/linux/kvm.h

+1 −0
Original line number Diff line number Diff line
@@ -895,6 +895,7 @@ struct kvm_ppc_resize_hpt { 
#define KVM_CAP_SPAPR_TCE_VFIO 142

#define KVM_CAP_X86_GUEST_MWAIT 143

#define KVM_CAP_ARM_USER_IRQ 144

#define KVM_CAP_PPC_FWNMI 145



#ifdef KVM_CAP_IRQ_ROUTING

CRA Git | Maintained and supported by SUSTech CRA and CCSE