Commit 13088c23 authored by Troy Kisky's avatar Troy Kisky Committed by Shawn Guo
Browse files

ARM: dts: imx: imx6sl.dtsi: use IRQ_TYPE_LEVEL_HIGH 



Make the interrupts node slightly more readable.

Signed-off-by: default avatarTroy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent f89f5b46

arch/arm/boot/dts/imx6sl.dtsi

+68 −57
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
 *

 */



#include <dt-bindings/interrupt-controller/irq.h>

#include "skeleton.dtsi"

#include "imx6sl-pinfunc.h"

#include <dt-bindings/clock/imx6sl-clock.h>
@@ -76,7 +77,7 @@ 
		L2: l2-cache@00a02000 {

			compatible = "arm,pl310-cache";

			reg = <0x00a02000 0x1000>;

			interrupts = <0 92 0x04>;

			interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;

			cache-unified;

			cache-level = <2>;

			arm,tag-latency = <4 2 3>;
@@ -85,7 +86,7 @@ 


		pmu {

			compatible = "arm,cortex-a9-pmu";

			interrupts = <0 94 0x04>;

			interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;

		};



		aips1: aips-bus@02000000 {
@@ -104,7 +105,7 @@ 


				spdif: spdif@02004000 {

					reg = <0x02004000 0x4000>;

					interrupts = <0 52 0x04>;

					interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;

				};



				ecspi1: ecspi@02008000 {
@@ -112,7 +113,7 @@ 
					#size-cells = <0>;

					compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";

					reg = <0x02008000 0x4000>;

					interrupts = <0 31 0x04>;

					interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clks IMX6SL_CLK_ECSPI1>,

						 <&clks IMX6SL_CLK_ECSPI1>;

					clock-names = "ipg", "per";
@@ -124,7 +125,7 @@ 
					#size-cells = <0>;

					compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";

					reg = <0x0200c000 0x4000>;

					interrupts = <0 32 0x04>;

					interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clks IMX6SL_CLK_ECSPI2>,

						 <&clks IMX6SL_CLK_ECSPI2>;

					clock-names = "ipg", "per";
@@ -136,7 +137,7 @@ 
					#size-cells = <0>;

					compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";

					reg = <0x02010000 0x4000>;

					interrupts = <0 33 0x04>;

					interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clks IMX6SL_CLK_ECSPI3>,

						 <&clks IMX6SL_CLK_ECSPI3>;

					clock-names = "ipg", "per";
@@ -148,7 +149,7 @@ 
					#size-cells = <0>;

					compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";

					reg = <0x02014000 0x4000>;

					interrupts = <0 34 0x04>;

					interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clks IMX6SL_CLK_ECSPI4>,

						 <&clks IMX6SL_CLK_ECSPI4>;

					clock-names = "ipg", "per";
@@ -159,7 +160,7 @@ 
					compatible = "fsl,imx6sl-uart",

						   "fsl,imx6q-uart", "fsl,imx21-uart";

					reg = <0x02018000 0x4000>;

					interrupts = <0 30 0x04>;

					interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clks IMX6SL_CLK_UART>,

						 <&clks IMX6SL_CLK_UART_SERIAL>;

					clock-names = "ipg", "per";
@@ -172,7 +173,7 @@ 
					compatible = "fsl,imx6sl-uart",

						   "fsl,imx6q-uart", "fsl,imx21-uart";

					reg = <0x02020000 0x4000>;

					interrupts = <0 26 0x04>;

					interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clks IMX6SL_CLK_UART>,

						 <&clks IMX6SL_CLK_UART_SERIAL>;

					clock-names = "ipg", "per";
@@ -185,7 +186,7 @@ 
					compatible = "fsl,imx6sl-uart",

						   "fsl,imx6q-uart", "fsl,imx21-uart";

					reg = <0x02024000 0x4000>;

					interrupts = <0 27 0x04>;

					interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clks IMX6SL_CLK_UART>,

						 <&clks IMX6SL_CLK_UART_SERIAL>;

					clock-names = "ipg", "per";
@@ -197,7 +198,7 @@ 
				ssi1: ssi@02028000 {

					compatible = "fsl,imx6sl-ssi","fsl,imx21-ssi";

					reg = <0x02028000 0x4000>;

					interrupts = <0 46 0x04>;

					interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clks IMX6SL_CLK_SSI1>;

					dmas = <&sdma 37 1 0>,

					       <&sdma 38 1 0>;
@@ -209,7 +210,7 @@ 
				ssi2: ssi@0202c000 {

					compatible = "fsl,imx6sl-ssi","fsl,imx21-ssi";

					reg = <0x0202c000 0x4000>;

					interrupts = <0 47 0x04>;

					interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clks IMX6SL_CLK_SSI2>;

					dmas = <&sdma 41 1 0>,

					       <&sdma 42 1 0>;
@@ -221,7 +222,7 @@ 
				ssi3: ssi@02030000 {

					compatible = "fsl,imx6sl-ssi","fsl,imx21-ssi";

					reg = <0x02030000 0x4000>;

					interrupts = <0 48 0x04>;

					interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clks IMX6SL_CLK_SSI3>;

					dmas = <&sdma 45 1 0>,

					       <&sdma 46 1 0>;
@@ -234,7 +235,7 @@ 
					compatible = "fsl,imx6sl-uart",

						   "fsl,imx6q-uart", "fsl,imx21-uart";

					reg = <0x02034000 0x4000>;

					interrupts = <0 28 0x04>;

					interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clks IMX6SL_CLK_UART>,

						 <&clks IMX6SL_CLK_UART_SERIAL>;

					clock-names = "ipg", "per";
@@ -247,7 +248,7 @@ 
					compatible = "fsl,imx6sl-uart",

						   "fsl,imx6q-uart", "fsl,imx21-uart";

					reg = <0x02038000 0x4000>;

					interrupts = <0 29 0x04>;

					interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;

					clocks = <&clks IMX6SL_CLK_UART>,

						 <&clks IMX6SL_CLK_UART_SERIAL>;

					clock-names = "ipg", "per";
@@ -261,7 +262,7 @@ 
				#pwm-cells = <2>;

				compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";

				reg = <0x02080000 0x4000>;

				interrupts = <0 83 0x04>;

				interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_PWM1>,

					 <&clks IMX6SL_CLK_PWM1>;

				clock-names = "ipg", "per";
@@ -271,7 +272,7 @@ 
				#pwm-cells = <2>;

				compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";

				reg = <0x02084000 0x4000>;

				interrupts = <0 84 0x04>;

				interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_PWM2>,

					 <&clks IMX6SL_CLK_PWM2>;

				clock-names = "ipg", "per";
@@ -281,7 +282,7 @@ 
				#pwm-cells = <2>;

				compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";

				reg = <0x02088000 0x4000>;

				interrupts = <0 85 0x04>;

				interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_PWM3>,

					 <&clks IMX6SL_CLK_PWM3>;

				clock-names = "ipg", "per";
@@ -291,7 +292,7 @@ 
				#pwm-cells = <2>;

				compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";

				reg = <0x0208c000 0x4000>;

				interrupts = <0 86 0x04>;

				interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_PWM4>,

					 <&clks IMX6SL_CLK_PWM4>;

				clock-names = "ipg", "per";
@@ -300,7 +301,7 @@ 
			gpt: gpt@02098000 {

				compatible = "fsl,imx6sl-gpt";

				reg = <0x02098000 0x4000>;

				interrupts = <0 55 0x04>;

				interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_GPT>,

					 <&clks IMX6SL_CLK_GPT_SERIAL>;

				clock-names = "ipg", "per";
@@ -309,7 +310,8 @@ 
			gpio1: gpio@0209c000 {

				compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";

				reg = <0x0209c000 0x4000>;

				interrupts = <0 66 0x04 0 67 0x04>;

				interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>,

					     <0 67 IRQ_TYPE_LEVEL_HIGH>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -319,7 +321,8 @@ 
			gpio2: gpio@020a0000 {

				compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";

				reg = <0x020a0000 0x4000>;

				interrupts = <0 68 0x04 0 69 0x04>;

				interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>,

					     <0 69 IRQ_TYPE_LEVEL_HIGH>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -329,7 +332,8 @@ 
			gpio3: gpio@020a4000 {

				compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";

				reg = <0x020a4000 0x4000>;

				interrupts = <0 70 0x04 0 71 0x04>;

				interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>,

					     <0 71 IRQ_TYPE_LEVEL_HIGH>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -339,7 +343,8 @@ 
			gpio4: gpio@020a8000 {

				compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";

				reg = <0x020a8000 0x4000>;

				interrupts = <0 72 0x04 0 73 0x04>;

				interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>,

					     <0 73 IRQ_TYPE_LEVEL_HIGH>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -349,7 +354,8 @@ 
			gpio5: gpio@020ac000 {

				compatible = "fsl,imx6sl-gpio", "fsl,imx35-gpio";

				reg = <0x020ac000 0x4000>;

				interrupts = <0 74 0x04 0 75 0x04>;

				interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>,

					     <0 75 IRQ_TYPE_LEVEL_HIGH>;

				gpio-controller;

				#gpio-cells = <2>;

				interrupt-controller;
@@ -358,20 +364,20 @@ 


			kpp: kpp@020b8000 {

				reg = <0x020b8000 0x4000>;

				interrupts = <0 82 0x04>;

				interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;

			};



			wdog1: wdog@020bc000 {

				compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt";

				reg = <0x020bc000 0x4000>;

				interrupts = <0 80 0x04>;

				interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_DUMMY>;

			};



			wdog2: wdog@020c0000 {

				compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt";

				reg = <0x020c0000 0x4000>;

				interrupts = <0 81 0x04>;

				interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_DUMMY>;

				status = "disabled";

			};
@@ -379,7 +385,8 @@ 
			clks: ccm@020c4000 {

				compatible = "fsl,imx6sl-ccm";

				reg = <0x020c4000 0x4000>;

				interrupts = <0 87 0x04 0 88 0x04>;

				interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,

					     <0 88 IRQ_TYPE_LEVEL_HIGH>;

				#clock-cells = <1>;

			};
@@ -388,7 +395,9 @@ 
					     "fsl,imx6q-anatop",

					     "syscon", "simple-bus";

				reg = <0x020c8000 0x1000>;

				interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>;

				interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,

					     <0 54 IRQ_TYPE_LEVEL_HIGH>,

					     <0 127 IRQ_TYPE_LEVEL_HIGH>;



				regulator-1p1@110 {

					compatible = "fsl,anatop-regulator";
@@ -487,14 +496,14 @@ 
			usbphy1: usbphy@020c9000 {

				compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy";

				reg = <0x020c9000 0x1000>;

				interrupts = <0 44 0x04>;

				interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_USBPHY1>;

			};



			usbphy2: usbphy@020ca000 {

				compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy";

				reg = <0x020ca000 0x1000>;

				interrupts = <0 45 0x04>;

				interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_USBPHY2>;

			};
@@ -507,31 +516,33 @@ 
				snvs-rtc-lp@34 {

					compatible = "fsl,sec-v4.0-mon-rtc-lp";

					reg = <0x34 0x58>;

					interrupts = <0 19 0x04 0 20 0x04>;

					interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,

						     <0 20 IRQ_TYPE_LEVEL_HIGH>;

				};

			};



			epit1: epit@020d0000 {

				reg = <0x020d0000 0x4000>;

				interrupts = <0 56 0x04>;

				interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;

			};



			epit2: epit@020d4000 {

				reg = <0x020d4000 0x4000>;

				interrupts = <0 57 0x04>;

				interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;

			};



			src: src@020d8000 {

				compatible = "fsl,imx6sl-src", "fsl,imx51-src";

				reg = <0x020d8000 0x4000>;

				interrupts = <0 91 0x04 0 96 0x04>;

				interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,

					     <0 96 IRQ_TYPE_LEVEL_HIGH>;

				#reset-cells = <1>;

			};



			gpc: gpc@020dc000 {

				compatible = "fsl,imx6sl-gpc", "fsl,imx6q-gpc";

				reg = <0x020dc000 0x4000>;

				interrupts = <0 89 0x04>;

				interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;

			};



			gpr: iomuxc-gpr@020e0000 {
@@ -547,18 +558,18 @@ 


			csi: csi@020e4000 {

				reg = <0x020e4000 0x4000>;

				interrupts = <0 7 0x04>;

				interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;

			};



			spdc: spdc@020e8000 {

				reg = <0x020e8000 0x4000>;

				interrupts = <0 6 0x04>;

				interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;

			};



			sdma: sdma@020ec000 {

				compatible = "fsl,imx6sl-sdma", "fsl,imx35-sdma";

				reg = <0x020ec000 0x4000>;

				interrupts = <0 2 0x04>;

				interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_SDMA>,

					 <&clks IMX6SL_CLK_SDMA>;

				clock-names = "ipg", "ahb";
@@ -569,22 +580,22 @@ 


			pxp: pxp@020f0000 {

				reg = <0x020f0000 0x4000>;

				interrupts = <0 98 0x04>;

				interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;

			};



			epdc: epdc@020f4000 {

				reg = <0x020f4000 0x4000>;

				interrupts = <0 97 0x04>;

				interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;

			};



			lcdif: lcdif@020f8000 {

				reg = <0x020f8000 0x4000>;

				interrupts = <0 39 0x04>;

				interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;

			};



			dcp: dcp@020fc000 {

				reg = <0x020fc000 0x4000>;

				interrupts = <0 99 0x04>;

				interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;

			};

		};
@@ -598,7 +609,7 @@ 
			usbotg1: usb@02184000 {

				compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";

				reg = <0x02184000 0x200>;

				interrupts = <0 43 0x04>;

				interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_USBOH3>;

				fsl,usbphy = <&usbphy1>;

				fsl,usbmisc = <&usbmisc 0>;
@@ -608,7 +619,7 @@ 
			usbotg2: usb@02184200 {

				compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";

				reg = <0x02184200 0x200>;

				interrupts = <0 42 0x04>;

				interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_USBOH3>;

				fsl,usbphy = <&usbphy2>;

				fsl,usbmisc = <&usbmisc 1>;
@@ -618,7 +629,7 @@ 
			usbh: usb@02184400 {

				compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";

				reg = <0x02184400 0x200>;

				interrupts = <0 40 0x04>;

				interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_USBOH3>;

				fsl,usbmisc = <&usbmisc 2>;

				status = "disabled";
@@ -634,7 +645,7 @@ 
			fec: ethernet@02188000 {

				compatible = "fsl,imx6sl-fec", "fsl,imx25-fec";

				reg = <0x02188000 0x4000>;

				interrupts = <0 114 0x04>;

				interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_ENET_REF>,

					 <&clks IMX6SL_CLK_ENET_REF>;

				clock-names = "ipg", "ahb";
@@ -644,7 +655,7 @@ 
			usdhc1: usdhc@02190000 {

				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";

				reg = <0x02190000 0x4000>;

				interrupts = <0 22 0x04>;

				interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_USDHC1>,

					 <&clks IMX6SL_CLK_USDHC1>,

					 <&clks IMX6SL_CLK_USDHC1>;
@@ -656,7 +667,7 @@ 
			usdhc2: usdhc@02194000 {

				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";

				reg = <0x02194000 0x4000>;

				interrupts = <0 23 0x04>;

				interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_USDHC2>,

					 <&clks IMX6SL_CLK_USDHC2>,

					 <&clks IMX6SL_CLK_USDHC2>;
@@ -668,7 +679,7 @@ 
			usdhc3: usdhc@02198000 {

				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";

				reg = <0x02198000 0x4000>;

				interrupts = <0 24 0x04>;

				interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_USDHC3>,

					 <&clks IMX6SL_CLK_USDHC3>,

					 <&clks IMX6SL_CLK_USDHC3>;
@@ -680,7 +691,7 @@ 
			usdhc4: usdhc@0219c000 {

				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";

				reg = <0x0219c000 0x4000>;

				interrupts = <0 25 0x04>;

				interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_USDHC4>,

					 <&clks IMX6SL_CLK_USDHC4>,

					 <&clks IMX6SL_CLK_USDHC4>;
@@ -694,7 +705,7 @@ 
				#size-cells = <0>;

				compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c";

				reg = <0x021a0000 0x4000>;

				interrupts = <0 36 0x04>;

				interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_I2C1>;

				status = "disabled";

			};
@@ -704,7 +715,7 @@ 
				#size-cells = <0>;

				compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c";

				reg = <0x021a4000 0x4000>;

				interrupts = <0 37 0x04>;

				interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_I2C2>;

				status = "disabled";

			};
@@ -714,7 +725,7 @@ 
				#size-cells = <0>;

				compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c";

				reg = <0x021a8000 0x4000>;

				interrupts = <0 38 0x04>;

				interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clks IMX6SL_CLK_I2C3>;

				status = "disabled";

			};
@@ -726,12 +737,12 @@ 


			rngb: rngb@021b4000 {

				reg = <0x021b4000 0x4000>;

				interrupts = <0 5 0x04>;

				interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;

			};



			weim: weim@021b8000 {

				reg = <0x021b8000 0x4000>;

				interrupts = <0 14 0x04>;

				interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;

			};



			ocotp: ocotp@021bc000 {

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