staging: wilc1000: fix line over 80 characters in wilc_spi_read_int() (12ec07a4) · Commits · 戴 / test

drivers/staging/wilc1000/wilc_spi.c

+29 −28

Original line number	Diff line number	Diff line
		@@ -939,13 +939,14 @@ static int wilc_spi_read_int(struct wilc wilc, u32 int_status)
		int happened, j;
		u32 unknown_mask;
		u32 irq_flags;
		int k = IRG_FLAGS_OFFSET + 5;

		if (g_spi.has_thrpt_enh) {
		ret = spi_internal_read(wilc, 0xe840 - WILC_SPI_REG_BASE,
		int_status);
		} else {
		ret = wilc_spi_read_reg(wilc, WILC_VMM_TO_HOST_SIZE,
		&byte_cnt);
		return ret;
		}
		ret = wilc_spi_read_reg(wilc, WILC_VMM_TO_HOST_SIZE, &byte_cnt);
		if (!ret) {
		dev_err(&spi->dev,
		"Failed read WILC_VMM_TO_HOST_SIZE ...\n");
		@@ -961,15 +962,16 @@ static int wilc_spi_read_int(struct wilc wilc, u32 int_status)
		tmp \|= ((irq_flags >> 27) << IRG_FLAGS_OFFSET);

		if (g_spi.nint > 5) {
		wilc_spi_read_reg(wilc, 0x1a94,
		&irq_flags);
		tmp \|= (((irq_flags >> 0) & 0x7) << (IRG_FLAGS_OFFSET + 5));
		wilc_spi_read_reg(wilc, 0x1a94, &irq_flags);
		tmp \|= (((irq_flags >> 0) & 0x7) << k);
		}

		unknown_mask = ~((1ul << g_spi.nint) - 1);

		if ((tmp >> IRG_FLAGS_OFFSET) & unknown_mask) {
		dev_err(&spi->dev, "Unexpected interrupt (2): j=%d, tmp=%x, mask=%x\n", j, tmp, unknown_mask);
		dev_err(&spi->dev,
		"Unexpected interrupt(2):j=%d,tmp=%x,mask=%x\n",
		j, tmp, unknown_mask);
		happened = 1;
		}

		@@ -977,7 +979,6 @@ static int wilc_spi_read_int(struct wilc wilc, u32 int_status)
		} while (happened);

		*int_status = tmp;
		}

		_fail_:
		return ret;