Commit 12c3f1fd authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/32s: get rid of CPU_FTR_601 feature 



Now that 601 is exclusive from other 6xx, CPU_FTR_601 and
associated fixups are useless.

Drop this feature and use #ifdefs instead.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/ecdb7194a17dbfa01865df6a82979533adc2c70b.1566834712.git.christophe.leroy@c-s.fr
parent f7a0bf7d

arch/powerpc/configs/pmac32_defconfig

+0 −1
Original line number Diff line number Diff line
@@ -20,7 +20,6 @@ CONFIG_CPU_FREQ=y 
CONFIG_CPU_FREQ_GOV_POWERSAVE=y

CONFIG_CPU_FREQ_GOV_USERSPACE=y

CONFIG_CPU_FREQ_PMAC=y

CONFIG_PPC601_SYNC_FIX=y

CONFIG_GEN_RTC=y

CONFIG_HIGHMEM=y

CONFIG_BINFMT_MISC=m

arch/powerpc/include/asm/cputable.h

+8 −6
Original line number Diff line number Diff line
@@ -145,7 +145,6 @@ static inline void cpu_feature_keys_init(void) { } 


/* Definitions for features that only exist on 32-bit chips */

#ifdef CONFIG_PPC32

#define CPU_FTR_601			ASM_CONST(0x00001000)

#define CPU_FTR_L2CR			ASM_CONST(0x00002000)

#define CPU_FTR_SPEC7450		ASM_CONST(0x00004000)

#define CPU_FTR_TAU			ASM_CONST(0x00008000)
@@ -167,7 +166,6 @@ static inline void cpu_feature_keys_init(void) { } 


#else	/* CONFIG_PPC32 */

/* Define these to 0 for the sake of tests in common code */

#define CPU_FTR_601			(0)

#define CPU_FTR_PPC_LE			(0)

#endif
@@ -294,7 +292,7 @@ static inline void cpu_feature_keys_init(void) { } 
#define CPU_FTR_MAYBE_CAN_NAP	0

#endif



#define CPU_FTRS_PPC601	(CPU_FTR_COMMON | CPU_FTR_601 | \

#define CPU_FTRS_PPC601	(CPU_FTR_COMMON | \

	CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_USE_RTC)

#define CPU_FTRS_603	(CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \

	    CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE | CPU_FTR_NOEXECUTE)
@@ -498,7 +496,9 @@ static inline void cpu_feature_keys_init(void) { } 
#else

enum {

	CPU_FTRS_POSSIBLE =

#ifdef CONFIG_PPC_BOOK3S_32

#ifdef CONFIG_PPC_BOOK3S_601

	    CPU_FTRS_PPC601 |

#elif defined(CONFIG_PPC_BOOK3S_32)

	    CPU_FTRS_PPC601 | CPU_FTRS_603 | CPU_FTRS_604 | CPU_FTRS_740_NOTAU |

	    CPU_FTRS_740 | CPU_FTRS_750 | CPU_FTRS_750FX1 |

	    CPU_FTRS_750FX2 | CPU_FTRS_750FX | CPU_FTRS_750GX |
@@ -574,8 +574,10 @@ enum { 
#else

enum {

	CPU_FTRS_ALWAYS =

#ifdef CONFIG_PPC_BOOK3S_32

	    CPU_FTRS_PPC601 & CPU_FTRS_603 & CPU_FTRS_604 & CPU_FTRS_740_NOTAU &

#ifdef CONFIG_PPC_BOOK3S_601

	    CPU_FTRS_PPC601 &

#elif defined(CONFIG_PPC_BOOK3S_32)

	    CPU_FTRS_603 & CPU_FTRS_604 & CPU_FTRS_740_NOTAU &

	    CPU_FTRS_740 & CPU_FTRS_750 & CPU_FTRS_750FX1 &

	    CPU_FTRS_750FX2 & CPU_FTRS_750FX & CPU_FTRS_750GX &

	    CPU_FTRS_7400_NOTAU & CPU_FTRS_7400 & CPU_FTRS_7450_20 &

arch/powerpc/include/asm/ppc_asm.h

+7 −21
Original line number Diff line number Diff line
@@ -383,19 +383,9 @@ n: 


/* various errata or part fixups */

#ifdef CONFIG_PPC601_SYNC_FIX

#define SYNC				\

BEGIN_FTR_SECTION			\

	sync;				\

	isync;				\

END_FTR_SECTION_IFSET(CPU_FTR_601)

#define SYNC_601			\

BEGIN_FTR_SECTION			\

	sync;				\

END_FTR_SECTION_IFSET(CPU_FTR_601)

#define ISYNC_601			\

BEGIN_FTR_SECTION			\

	isync;				\

END_FTR_SECTION_IFSET(CPU_FTR_601)

#define SYNC		sync; isync

#define SYNC_601	sync

#define ISYNC_601	isync

#else

#define	SYNC

#define SYNC_601
@@ -421,15 +411,11 @@ END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96) 
#define MFTBU(dest)			mfspr dest, SPRN_TBRU

#endif



#ifndef CONFIG_SMP

#define TLBSYNC

#else /* CONFIG_SMP */

/* tlbsync is not implemented on 601 */

#define TLBSYNC				\

BEGIN_FTR_SECTION			\

	tlbsync;			\

	sync;				\

END_FTR_SECTION_IFCLR(CPU_FTR_601)

#if !defined(CONFIG_SMP) || defined(CONFIG_PPC_BOOK3S_601)

#define TLBSYNC

#else

#define TLBSYNC		tlbsync; sync

#endif



#ifdef CONFIG_PPC64

arch/powerpc/include/asm/ptrace.h

+5 −1
Original line number Diff line number Diff line
@@ -203,7 +203,11 @@ do { \ 
#endif /* __powerpc64__ */



#define arch_has_single_step()	(1)

#define arch_has_block_step()	(!cpu_has_feature(CPU_FTR_601))

#ifndef CONFIG_BOOK3S_601

#define arch_has_block_step()	(true)

#else

#define arch_has_block_step()	(false)

#endif

#define ARCH_HAS_USER_SINGLE_STEP_REPORT



/*

arch/powerpc/include/asm/timex.h

+3 −31
Original line number Diff line number Diff line
@@ -17,38 +17,10 @@ typedef unsigned long cycles_t; 


static inline cycles_t get_cycles(void)

{

#ifdef __powerpc64__

	return mftb();

#else

	cycles_t ret;

	if (IS_ENABLED(CONFIG_BOOK3S_601))

		return 0;



	/*

	 * For the "cycle" counter we use the timebase lower half.

	 * Currently only used on SMP.

	 */



	ret = 0;



	__asm__ __volatile__(

#ifdef CONFIG_PPC_8xx

		"97:	mftb %0\n"

#else

		"97:	mfspr %0, %2\n"

#endif

		"99:\n"

		".section __ftr_fixup,\"a\"\n"

		".align 2\n"

		"98:\n"

		"	.long %1\n"

		"	.long 0\n"

		"	.long 97b-98b\n"

		"	.long 99b-98b\n"

		"	.long 0\n"

		"	.long 0\n"

		".previous"

		: "=r" (ret) : "i" (CPU_FTR_601), "i" (SPRN_TBRL));

	return ret;

#endif

	return mftb();

}



#endif	/* __KERNEL__ */

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