Commit 12a7cfef authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Rafael J. Wysocki
Browse files

ARM: shmobile: sh73a0: add USB clock support 



It is required from renesas_usbhs driver.
This patch is based on v2.0 manual.

Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: default avatarMagnus Damm <damm@opensource.se>
Signed-off-by: default avatarRafael J. Wysocki <rjw@sisk.pl>
parent ddc0c5eb

arch/arm/mach-shmobile/clock-sh73a0.c

+3 −1
Original line number Diff line number Diff line
@@ -477,7 +477,7 @@ enum { MSTP001, 
	MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,

	MSTP219, MSTP218,

	MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,

	MSTP331, MSTP329, MSTP328, MSTP325, MSTP323,

	MSTP331, MSTP329, MSTP328, MSTP325, MSTP323, MSTP322,

	MSTP314, MSTP313, MSTP312, MSTP311,

	MSTP303, MSTP302, MSTP301, MSTP300,

	MSTP411, MSTP410, MSTP403,
@@ -510,6 +510,7 @@ static struct clk mstp_clks[MSTP_NR] = { 
	[MSTP328] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 28, 0), /*FSI*/

	[MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */

	[MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */

	[MSTP322] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 22, 0), /* USB */

	[MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */

	[MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */

	[MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
@@ -566,6 +567,7 @@ static struct clk_lookup lookups[] = { 
	CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */

	CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */

	CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */

	CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP322]), /* USB */

	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */

	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */

	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */

CRA Git | Maintained and supported by SUSTech CRA and CCSE