Commit 1295524e authored by Nicholas Kazlauskas's avatar Nicholas Kazlauskas Committed by Alex Deucher
Browse files

drm/amd/display: Soft reset DMUIF during DMUB reset 



[Why]
We need to ensure that the DMUIF in MMHUBBUB is also in reset so we
aren't generating requests while the DMCUB is in reset.

[How]
Set DMUIF_SOFT_RESET=1 on reset and DMUIF_SOFT_RESET=0 on reset
release.

Signed-off-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent dee5d542

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c

+2 −0
Original line number Diff line number Diff line
@@ -66,10 +66,12 @@ void dmub_dcn20_reset(struct dmub_srv *dmub) 
{

	REG_UPDATE(DMCUB_CNTL, DMCUB_SOFT_RESET, 1);

	REG_UPDATE(DMCUB_CNTL, DMCUB_ENABLE, 0);

	REG_UPDATE(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET, 1);

}



void dmub_dcn20_reset_release(struct dmub_srv *dmub)

{

	REG_UPDATE(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET, 0);

	REG_WRITE(DMCUB_SCRATCH15, dmub->psp_version & 0x001100FF);

	REG_UPDATE_2(DMCUB_CNTL, DMCUB_ENABLE, 1, DMCUB_TRACEPORT_EN, 1);

	REG_UPDATE(DMCUB_CNTL, DMCUB_SOFT_RESET, 0);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

+4 −2
Original line number Diff line number Diff line
@@ -91,7 +91,8 @@ struct dmub_srv; 
	DMUB_SR(DMCUB_SCRATCH13) \

	DMUB_SR(DMCUB_SCRATCH14) \

	DMUB_SR(DMCUB_SCRATCH15) \

	DMUB_SR(CC_DC_PIPE_DIS)

	DMUB_SR(CC_DC_PIPE_DIS) \

	DMUB_SR(MMHUBBUB_SOFT_RESET)



#define DMUB_COMMON_FIELDS() \

	DMUB_SF(DMCUB_CNTL, DMCUB_ENABLE) \
@@ -119,7 +120,8 @@ struct dmub_srv; 
	DMUB_SF(DMCUB_REGION3_CW7_TOP_ADDRESS, DMCUB_REGION3_CW7_ENABLE) \

	DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_TOP_ADDRESS) \

	DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_ENABLE) \

	DMUB_SF(CC_DC_PIPE_DIS, DC_DMCUB_ENABLE)

	DMUB_SF(CC_DC_PIPE_DIS, DC_DMCUB_ENABLE) \

	DMUB_SF(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET)



struct dmub_srv_common_reg_offset {

#define DMUB_SR(reg) uint32_t reg;

CRA Git | Maintained and supported by SUSTech CRA and CCSE