Commit 12526b0d authored by Michael Ellerman's avatar Michael Ellerman
Browse files

Merge branch 'next' of https://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux into next 

Freescale updates from Scott:

"Highlights include elimination of legacy clock bindings use from dts
 files, an 83xx watchdog handler, fixes to old dts interrupt errors, and
 some minor cleanup."
parents 9bbc7e4c 63d86876

Documentation/devicetree/bindings/clock/qoriq-clock.txt

+6 −0
Original line number Diff line number Diff line
@@ -28,6 +28,12 @@ Required properties: 
	* "fsl,p4080-clockgen"

	* "fsl,p5020-clockgen"

	* "fsl,p5040-clockgen"

	* "fsl,t1023-clockgen"

	* "fsl,t1024-clockgen"

	* "fsl,t1040-clockgen"

	* "fsl,t1042-clockgen"

	* "fsl,t2080-clockgen"

	* "fsl,t2081-clockgen"

	* "fsl,t4240-clockgen"

	* "fsl,b4420-clockgen"

	* "fsl,b4860-clockgen"

arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -70,14 +70,14 @@ 
		cpu0: PowerPC,e6500@0 {

			device_type = "cpu";

			reg = <0 1>;

			clocks = <&mux0>;

			clocks = <&clockgen 1 0>;

			next-level-cache = <&L2_1>;

			fsl,portid-mapping = <0x80000000>;

		};

		cpu1: PowerPC,e6500@2 {

			device_type = "cpu";

			reg = <2 3>;

			clocks = <&mux0>;

			clocks = <&clockgen 1 0>;

			next-level-cache = <&L2_1>;

			fsl,portid-mapping = <0x80000000>;

		};

arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -75,28 +75,28 @@ 
		cpu0: PowerPC,e6500@0 {

			device_type = "cpu";

			reg = <0 1>;

			clocks = <&mux0>;

			clocks = <&clockgen 1 0>;

			next-level-cache = <&L2_1>;

			fsl,portid-mapping = <0x80000000>;

		};

		cpu1: PowerPC,e6500@2 {

			device_type = "cpu";

			reg = <2 3>;

			clocks = <&mux0>;

			clocks = <&clockgen 1 0>;

			next-level-cache = <&L2_1>;

			fsl,portid-mapping = <0x80000000>;

		};

		cpu2: PowerPC,e6500@4 {

			device_type = "cpu";

			reg = <4 5>;

			clocks = <&mux0>;

			clocks = <&clockgen 1 0>;

			next-level-cache = <&L2_1>;

			fsl,portid-mapping = <0x80000000>;

		};

		cpu3: PowerPC,e6500@6 {

			device_type = "cpu";

			reg = <6 7>;

			clocks = <&mux0>;

			clocks = <&clockgen 1 0>;

			next-level-cache = <&L2_1>;

			fsl,portid-mapping = <0x80000000>;

		};

arch/powerpc/boot/dts/fsl/b4si-post.dtsi

+0 −15
Original line number Diff line number Diff line
@@ -398,21 +398,6 @@ 
	};



/include/ "qoriq-clockgen2.dtsi"

	clockgen: global-utilities@e1000 {

		compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0";

		reg = <0xe1000 0x1000>;



		mux0: mux0@0 {

			#clock-cells = <0>;

			reg = <0x0 0x4>;

			compatible = "fsl,qoriq-core-mux-2.0";

			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,

				<&pll1 0>, <&pll1 1>, <&pll1 2>;

			clock-names = "pll0", "pll0-div2", "pll0-div4",

				"pll1", "pll1-div2", "pll1-div4";

			clock-output-names = "cmux0";

		};

	};



	rcpm: global-utilities@e2000 {

		compatible = "fsl,b4-rcpm", "fsl,qoriq-rcpm-2.0";

arch/powerpc/boot/dts/fsl/mpc8641_hpcn.dts

+64 −64
Original line number Diff line number Diff line
@@ -169,100 +169,100 @@ 
		interrupt-map-mask = <0xff00 0 0 7>;

		interrupt-map = <

			/* IDSEL 0x11 func 0 - PCI slot 1 */

			0x8800 0 0 1 &mpic 2 1

			0x8800 0 0 2 &mpic 3 1

			0x8800 0 0 3 &mpic 4 1

			0x8800 0 0 4 &mpic 1 1

			0x8800 0 0 1 &mpic 2 1 0 0

			0x8800 0 0 2 &mpic 3 1 0 0

			0x8800 0 0 3 &mpic 4 1 0 0

			0x8800 0 0 4 &mpic 1 1 0 0



			/* IDSEL 0x11 func 1 - PCI slot 1 */

			0x8900 0 0 1 &mpic 2 1

			0x8900 0 0 2 &mpic 3 1

			0x8900 0 0 3 &mpic 4 1

			0x8900 0 0 4 &mpic 1 1

			0x8900 0 0 1 &mpic 2 1 0 0

			0x8900 0 0 2 &mpic 3 1 0 0

			0x8900 0 0 3 &mpic 4 1 0 0

			0x8900 0 0 4 &mpic 1 1 0 0



			/* IDSEL 0x11 func 2 - PCI slot 1 */

			0x8a00 0 0 1 &mpic 2 1

			0x8a00 0 0 2 &mpic 3 1

			0x8a00 0 0 3 &mpic 4 1

			0x8a00 0 0 4 &mpic 1 1

			0x8a00 0 0 1 &mpic 2 1 0 0

			0x8a00 0 0 2 &mpic 3 1 0 0

			0x8a00 0 0 3 &mpic 4 1 0 0

			0x8a00 0 0 4 &mpic 1 1 0 0



			/* IDSEL 0x11 func 3 - PCI slot 1 */

			0x8b00 0 0 1 &mpic 2 1

			0x8b00 0 0 2 &mpic 3 1

			0x8b00 0 0 3 &mpic 4 1

			0x8b00 0 0 4 &mpic 1 1

			0x8b00 0 0 1 &mpic 2 1 0 0

			0x8b00 0 0 2 &mpic 3 1 0 0

			0x8b00 0 0 3 &mpic 4 1 0 0

			0x8b00 0 0 4 &mpic 1 1 0 0



			/* IDSEL 0x11 func 4 - PCI slot 1 */

			0x8c00 0 0 1 &mpic 2 1

			0x8c00 0 0 2 &mpic 3 1

			0x8c00 0 0 3 &mpic 4 1

			0x8c00 0 0 4 &mpic 1 1

			0x8c00 0 0 1 &mpic 2 1 0 0

			0x8c00 0 0 2 &mpic 3 1 0 0

			0x8c00 0 0 3 &mpic 4 1 0 0

			0x8c00 0 0 4 &mpic 1 1 0 0



			/* IDSEL 0x11 func 5 - PCI slot 1 */

			0x8d00 0 0 1 &mpic 2 1

			0x8d00 0 0 2 &mpic 3 1

			0x8d00 0 0 3 &mpic 4 1

			0x8d00 0 0 4 &mpic 1 1

			0x8d00 0 0 1 &mpic 2 1 0 0

			0x8d00 0 0 2 &mpic 3 1 0 0

			0x8d00 0 0 3 &mpic 4 1 0 0

			0x8d00 0 0 4 &mpic 1 1 0 0



			/* IDSEL 0x11 func 6 - PCI slot 1 */

			0x8e00 0 0 1 &mpic 2 1

			0x8e00 0 0 2 &mpic 3 1

			0x8e00 0 0 3 &mpic 4 1

			0x8e00 0 0 4 &mpic 1 1

			0x8e00 0 0 1 &mpic 2 1 0 0

			0x8e00 0 0 2 &mpic 3 1 0 0

			0x8e00 0 0 3 &mpic 4 1 0 0

			0x8e00 0 0 4 &mpic 1 1 0 0



			/* IDSEL 0x11 func 7 - PCI slot 1 */

			0x8f00 0 0 1 &mpic 2 1

			0x8f00 0 0 2 &mpic 3 1

			0x8f00 0 0 3 &mpic 4 1

			0x8f00 0 0 4 &mpic 1 1

			0x8f00 0 0 1 &mpic 2 1 0 0

			0x8f00 0 0 2 &mpic 3 1 0 0

			0x8f00 0 0 3 &mpic 4 1 0 0

			0x8f00 0 0 4 &mpic 1 1 0 0



			/* IDSEL 0x12 func 0 - PCI slot 2 */

			0x9000 0 0 1 &mpic 3 1

			0x9000 0 0 2 &mpic 4 1

			0x9000 0 0 3 &mpic 1 1

			0x9000 0 0 4 &mpic 2 1

			0x9000 0 0 1 &mpic 3 1 0 0

			0x9000 0 0 2 &mpic 4 1 0 0

			0x9000 0 0 3 &mpic 1 1 0 0

			0x9000 0 0 4 &mpic 2 1 0 0



			/* IDSEL 0x12 func 1 - PCI slot 2 */

			0x9100 0 0 1 &mpic 3 1

			0x9100 0 0 2 &mpic 4 1

			0x9100 0 0 3 &mpic 1 1

			0x9100 0 0 4 &mpic 2 1

			0x9100 0 0 1 &mpic 3 1 0 0

			0x9100 0 0 2 &mpic 4 1 0 0

			0x9100 0 0 3 &mpic 1 1 0 0

			0x9100 0 0 4 &mpic 2 1 0 0



			/* IDSEL 0x12 func 2 - PCI slot 2 */

			0x9200 0 0 1 &mpic 3 1

			0x9200 0 0 2 &mpic 4 1

			0x9200 0 0 3 &mpic 1 1

			0x9200 0 0 4 &mpic 2 1

			0x9200 0 0 1 &mpic 3 1 0 0

			0x9200 0 0 2 &mpic 4 1 0 0

			0x9200 0 0 3 &mpic 1 1 0 0

			0x9200 0 0 4 &mpic 2 1 0 0



			/* IDSEL 0x12 func 3 - PCI slot 2 */

			0x9300 0 0 1 &mpic 3 1

			0x9300 0 0 2 &mpic 4 1

			0x9300 0 0 3 &mpic 1 1

			0x9300 0 0 4 &mpic 2 1

			0x9300 0 0 1 &mpic 3 1 0 0

			0x9300 0 0 2 &mpic 4 1 0 0

			0x9300 0 0 3 &mpic 1 1 0 0

			0x9300 0 0 4 &mpic 2 1 0 0



			/* IDSEL 0x12 func 4 - PCI slot 2 */

			0x9400 0 0 1 &mpic 3 1

			0x9400 0 0 2 &mpic 4 1

			0x9400 0 0 3 &mpic 1 1

			0x9400 0 0 4 &mpic 2 1

			0x9400 0 0 1 &mpic 3 1 0 0

			0x9400 0 0 2 &mpic 4 1 0 0

			0x9400 0 0 3 &mpic 1 1 0 0

			0x9400 0 0 4 &mpic 2 1 0 0



			/* IDSEL 0x12 func 5 - PCI slot 2 */

			0x9500 0 0 1 &mpic 3 1

			0x9500 0 0 2 &mpic 4 1

			0x9500 0 0 3 &mpic 1 1

			0x9500 0 0 4 &mpic 2 1

			0x9500 0 0 1 &mpic 3 1 0 0

			0x9500 0 0 2 &mpic 4 1 0 0

			0x9500 0 0 3 &mpic 1 1 0 0

			0x9500 0 0 4 &mpic 2 1 0 0



			/* IDSEL 0x12 func 6 - PCI slot 2 */

			0x9600 0 0 1 &mpic 3 1

			0x9600 0 0 2 &mpic 4 1

			0x9600 0 0 3 &mpic 1 1

			0x9600 0 0 4 &mpic 2 1

			0x9600 0 0 1 &mpic 3 1 0 0

			0x9600 0 0 2 &mpic 4 1 0 0

			0x9600 0 0 3 &mpic 1 1 0 0

			0x9600 0 0 4 &mpic 2 1 0 0



			/* IDSEL 0x12 func 7 - PCI slot 2 */

			0x9700 0 0 1 &mpic 3 1

			0x9700 0 0 2 &mpic 4 1

			0x9700 0 0 3 &mpic 1 1

			0x9700 0 0 4 &mpic 2 1

			0x9700 0 0 1 &mpic 3 1 0 0

			0x9700 0 0 2 &mpic 4 1 0 0

			0x9700 0 0 3 &mpic 1 1 0 0

			0x9700 0 0 4 &mpic 2 1 0 0



			// IDSEL 0x1c  USB

			0xe000 0 0 1 &i8259 12 2

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