Commit 12460a0a authored by Claudiu Manoil's avatar Claudiu Manoil Committed by David S. Miller
Browse files

enetc: Fix interrupt coalescing register naming 



Interrupt coalescing registers naming in the current revision
of the Ref Man (RM) is ICR, deprecating the ICIR name used
in earlier (draft) versions of the RM.

Signed-off-by: default avatarClaudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent bbb96dc7

drivers/net/ethernet/freescale/enetc/enetc.c

+2 −2
Original line number Diff line number Diff line
@@ -1140,7 +1140,7 @@ static void enetc_setup_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring) 
	tx_ring->next_to_clean = enetc_txbdr_rd(hw, idx, ENETC_TBCIR);



	/* enable Tx ints by setting pkt thr to 1 */

	enetc_txbdr_wr(hw, idx, ENETC_TBICIR0, ENETC_TBICIR0_ICEN | 0x1);

	enetc_txbdr_wr(hw, idx, ENETC_TBICR0, ENETC_TBICR0_ICEN | 0x1);



	tbmr = ENETC_TBMR_EN;

	if (tx_ring->ndev->features & NETIF_F_HW_VLAN_CTAG_TX)
@@ -1174,7 +1174,7 @@ static void enetc_setup_rxbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring) 
	enetc_rxbdr_wr(hw, idx, ENETC_RBPIR, 0);



	/* enable Rx ints by setting pkt thr to 1 */

	enetc_rxbdr_wr(hw, idx, ENETC_RBICIR0, ENETC_RBICIR0_ICEN | 0x1);

	enetc_rxbdr_wr(hw, idx, ENETC_RBICR0, ENETC_RBICR0_ICEN | 0x1);



	rbmr = ENETC_RBMR_EN;

drivers/net/ethernet/freescale/enetc/enetc_ethtool.c

+1 −1
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@ static const u32 enetc_txbdr_regs[] = { 


static const u32 enetc_rxbdr_regs[] = {

	ENETC_RBMR, ENETC_RBSR, ENETC_RBBSR, ENETC_RBCIR, ENETC_RBBAR0,

	ENETC_RBBAR1, ENETC_RBPIR, ENETC_RBLENR, ENETC_RBICIR0, ENETC_RBIER

	ENETC_RBBAR1, ENETC_RBPIR, ENETC_RBLENR, ENETC_RBICR0, ENETC_RBIER

};



static const u32 enetc_port_regs[] = {

drivers/net/ethernet/freescale/enetc/enetc_hw.h

+4 −4
Original line number Diff line number Diff line
@@ -121,8 +121,8 @@ enum enetc_bdr_type {TX, RX}; 
#define ENETC_RBIER	0xa0

#define ENETC_RBIER_RXTIE	BIT(0)

#define ENETC_RBIDR	0xa4

#define ENETC_RBICIR0	0xa8

#define ENETC_RBICIR0_ICEN	BIT(31)

#define ENETC_RBICR0	0xa8

#define ENETC_RBICR0_ICEN	BIT(31)



/* TX BDR reg offsets */

#define ENETC_TBMR	0
@@ -141,8 +141,8 @@ enum enetc_bdr_type {TX, RX}; 
#define ENETC_TBIER	0xa0

#define ENETC_TBIER_TXTIE	BIT(0)

#define ENETC_TBIDR	0xa4

#define ENETC_TBICIR0	0xa8

#define ENETC_TBICIR0_ICEN	BIT(31)

#define ENETC_TBICR0	0xa8

#define ENETC_TBICR0_ICEN	BIT(31)



#define ENETC_RTBLENR_LEN(n)	((n) & ~0x7)

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