Commit 11eaaadb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata 

Pull libata updates from Tejun Heo:
 "Most are ahci and other device specific additions.  Dan cleaned up
  ahci IRQ handling to prepare for future MSIX changes.  On the libata
  core side, Vinayak updated SG handling so that NCQ commands can be
  issued through SG_IO and Christoph cleaned up code a bit.  There's one
  merge from for-4.3-fixes to include a pata_macio commit that didn't
  get pushed out"

* 'for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
  ahci: add new Intel device IDs
  ahci: Add Marvell 88se91a2 device id
  ahci: cleanup ahci_host_activate_multi_irqs
  ahci: ahci_host_activate: kill IRQF_SHARED
  devicetree: bindings: Fixed a few typos
  ahci: qoriq: Disable NCQ on ls2080a SoC
  ahci: qoriq: Rename LS2085A SoC support code to LS2080A
  libata: enable LBA flag in taskfile for ata_scsi_pass_thru()
  libata: add support for NCQ commands for SG interface
  ahci: qoriq: Fix a compiling warning
  pata_it821x: use "const char *" for string literals
  libata: only call ->done once all per-tag ressources are released
  libata: cleanup ata_scsi_qc_complete
  ata: ahci: find eSATA ports and flag them as removable
  libata: samsung_cf: fix handling platform_get_irq result
  ata: pata_macio: Fix module autoload for OF platform driver
  ata: pata_pxa: dmaengine conversion
  ahci: added a new driver for supporting Freescale AHCI sata
  devicetree:bindings: add devicetree bindings for Freescale AHCI
  Revert "ahci: added support for Freescale AHCI sata"
parents e25ac7dd 159b5bb4

Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt

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Binding for Freescale QorIQ AHCI SATA Controller



Required properties:

  - reg: Physical base address and size of the controller's register area.

  - compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where

    chip could be ls1021a, ls2080a, ls1043a etc.

  - clocks: Input clock specifier. Refer to common clock bindings.

  - interrupts: Interrupt specifier. Refer to interrupt binding.



Optional properties:

  - dma-coherent: Enable AHCI coherent DMA operation.

  - reg-names: register area names when there are more than 1 register area.



Examples:

	sata@3200000 {

		compatible = "fsl,ls1021a-ahci";

		reg = <0x0 0x3200000 0x0 0x10000>;

		interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&platform_clk 1>;

		dma-coherent;

	};

Documentation/devicetree/bindings/ata/ahci-platform.txt

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@@ -16,8 +16,6 @@ Required properties: 
  - "snps,dwc-ahci"

  - "snps,exynos5440-ahci"

  - "snps,spear-ahci"

  - "fsl,qoriq-ahci" : for qoriq series socs which include ls1021, ls2085, etc.

  - "fsl,<chip>-ahci" : chip could be ls1021, ls2085 etc.

  - "generic-ahci"

- interrupts        : <interrupt mapping for SATA IRQ>

- reg               : <registers mapping>

drivers/ata/Kconfig

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@@ -175,6 +175,15 @@ config AHCI_XGENE 
	help

	 This option enables support for APM X-Gene SoC SATA host controller.



config AHCI_QORIQ

	tristate "Freescale QorIQ AHCI SATA support"

	depends on OF

	help

	  This option enables support for the Freescale QorIQ AHCI SoC's

	  onboard AHCI SATA.



	  If unsure, say N.



config SATA_FSL

	tristate "Freescale 3.0Gbps SATA support"

	depends on FSL_SOC

drivers/ata/Makefile

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@@ -19,6 +19,7 @@ obj-$(CONFIG_AHCI_SUNXI) += ahci_sunxi.o libahci.o libahci_platform.o 
obj-$(CONFIG_AHCI_ST)		+= ahci_st.o libahci.o libahci_platform.o

obj-$(CONFIG_AHCI_TEGRA)	+= ahci_tegra.o libahci.o libahci_platform.o

obj-$(CONFIG_AHCI_XGENE)	+= ahci_xgene.o libahci.o libahci_platform.o

obj-$(CONFIG_AHCI_QORIQ)	+= ahci_qoriq.o libahci.o libahci_platform.o



# SFF w/ custom DMA

obj-$(CONFIG_PDC_ADMA)		+= pdc_adma.o

drivers/ata/ahci.c

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@@ -314,6 +314,16 @@ static const struct pci_device_id ahci_pci_tbl[] = { 
	{ PCI_VDEVICE(INTEL, 0x1f37), board_ahci_avn }, /* Avoton RAID */

	{ PCI_VDEVICE(INTEL, 0x1f3e), board_ahci_avn }, /* Avoton RAID */

	{ PCI_VDEVICE(INTEL, 0x1f3f), board_ahci_avn }, /* Avoton RAID */

	{ PCI_VDEVICE(INTEL, 0xa182), board_ahci }, /* Lewisburg AHCI*/

	{ PCI_VDEVICE(INTEL, 0xa202), board_ahci }, /* Lewisburg AHCI*/

	{ PCI_VDEVICE(INTEL, 0xa184), board_ahci }, /* Lewisburg RAID*/

	{ PCI_VDEVICE(INTEL, 0xa204), board_ahci }, /* Lewisburg RAID*/

	{ PCI_VDEVICE(INTEL, 0xa186), board_ahci }, /* Lewisburg RAID*/

	{ PCI_VDEVICE(INTEL, 0xa206), board_ahci }, /* Lewisburg RAID*/

	{ PCI_VDEVICE(INTEL, 0x2822), board_ahci }, /* Lewisburg RAID*/

	{ PCI_VDEVICE(INTEL, 0x2826), board_ahci }, /* Lewisburg RAID*/

	{ PCI_VDEVICE(INTEL, 0xa18e), board_ahci }, /* Lewisburg RAID*/

	{ PCI_VDEVICE(INTEL, 0xa20e), board_ahci }, /* Lewisburg RAID*/

	{ PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Wellsburg RAID */

	{ PCI_VDEVICE(INTEL, 0x2827), board_ahci }, /* Wellsburg RAID */

	{ PCI_VDEVICE(INTEL, 0x8d02), board_ahci }, /* Wellsburg AHCI */
@@ -489,6 +499,8 @@ static const struct pci_device_id ahci_pci_tbl[] = { 
	  .driver_data = board_ahci_yes_fbs },			/* 88se9172 on some Gigabyte */

	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x91a0),

	  .driver_data = board_ahci_yes_fbs },

	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x91a2), 	/* 88se91a2 */

	  .driver_data = board_ahci_yes_fbs },

	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x91a3),

	  .driver_data = board_ahci_yes_fbs },

	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9230),

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