Commit 117eda8f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'tty-4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty 

Pull tty/serial driver updates from Greg KH:
 "Here is the large TTY/Serial driver set of patches for 4.21-rc1.

  A number of small serial driver changes along with some good tty core
  fixes for long-reported issues with locking. There is also a new
  console font added to the tree, for high-res screens, so that should
  be helpful for many.

  The last patch in the series is a revert of an older one in the tree,
  it came late but it resolves a reported issue that linux-next was
  having for some people.

  Full details are in the shortlog, and all of these, with the exception
  of the revert, have been in linux-next for a while with no reported
  issues"

* tag 'tty-4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (85 commits)
  Revert "serial: 8250: Default SERIAL_OF_PLATFORM to SERIAL_8250"
  serial: sccnxp: Allow to use non-standard baud rates
  serial: sccnxp: Adds a delay between sequential read/write cycles
  tty: serial: qcom_geni_serial: Fix UART hang
  tty: serial: qcom_geni_serial: Fix wrap around of TX buffer
  serial: max310x: Fix tx_empty() callback
  dt-bindings: serial: sh-sci: Document r8a774c0 bindings
  dt-bindings: serial: sh-sci: Document r8a774a1 bindings
  Fonts: New Terminus large console font
  dt-bindings: serial: lpuart: add imx8qxp compatible string
  serial: uartps: Fix interrupt mask issue to handle the RX interrupts properly
  serial: uartps: Fix error path when alloc failed
  serial: uartps: Check if the device is a console
  serial: uartps: Add the device_init_wakeup
  tty: serial: samsung: Increase maximum baudrate
  tty: serial: samsung: Properly set flags in autoCTS mode
  tty: Use of_node_name_{eq,prefix} for node name comparisons
  tty/serial: do not free trasnmit buffer page under port lock
  serial: 8250: Rate limit serial port rx interrupts during input overruns
  dt-bindings: serial: 8250: Add rate limit for serial port input overruns
  ...
parents c0ea81b4 598134ff

Documentation/devicetree/bindings/dma/8250_mtk_dma.txt

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+33 −0
Original line number Diff line number Diff line 
* Mediatek UART APDMA Controller



Required properties:

- compatible should contain:

  * "mediatek,mt2712-uart-dma" for MT2712 compatible APDMA

  * "mediatek,mt6577-uart-dma" for MT6577 and all of the above



- reg: The base address of the APDMA register bank.



- interrupts: A single interrupt specifier.



- clocks : Must contain an entry for each entry in clock-names.

  See ../clocks/clock-bindings.txt for details.

- clock-names: The APDMA clock for register accesses



Examples:



	apdma: dma-controller@11000380 {

		compatible = "mediatek,mt2712-uart-dma";

		reg = <0 0x11000380 0 0x400>;

		interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 65 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 66 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 67 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 68 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 69 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 70 IRQ_TYPE_LEVEL_LOW>;

		clocks = <&pericfg CLK_PERI_AP_DMA>;

		clock-names = "apdma";

		#dma-cells = <1>;

	};

Documentation/devicetree/bindings/serial/8250.txt

+1 −0
Original line number Diff line number Diff line
@@ -51,6 +51,7 @@ Optional properties: 
- tx-threshold: Specify the TX FIFO low water indication for parts with

  programmable TX FIFO thresholds.

- resets : phandle + reset specifier pairs

- overrun-throttle-ms : how long to pause uart rx when input overrun is encountered.



Note:

* fsl,ns16550:

Documentation/devicetree/bindings/serial/fsl-lpuart.txt

+2 −0
Original line number Diff line number Diff line
@@ -8,6 +8,8 @@ Required properties: 
    on LS1021A SoC with 32-bit big-endian register organization

  - "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated

    on i.MX7ULP SoC with 32-bit little-endian register organization

  - "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated

    on i.MX8QXP SoC with 32-bit little-endian register organization

- reg : Address and length of the register set for the device

- interrupts : Should contain uart interrupt

- clocks : phandle + clock specifier pairs, one for each entry in clock-names

Documentation/devicetree/bindings/serial/lantiq_asc.txt

+15 −0
Original line number Diff line number Diff line
@@ -6,8 +6,23 @@ Required properties: 
- interrupts: the 3 (tx rx err) interrupt numbers. The interrupt specifier

  depends on the interrupt-parent interrupt controller.



Optional properties:

- clocks: Should contain frequency clock and gate clock

- clock-names: Should be "freq" and "asc"



Example:



asc0: serial@16600000 {

	compatible = "lantiq,asc";

	reg = <0x16600000 0x100000>;

	interrupt-parent = <&gic>;

	interrupts = <GIC_SHARED 103 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SHARED 105 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SHARED 106 IRQ_TYPE_LEVEL_HIGH>;

	clocks = <&cgu CLK_SSX4>, <&cgu GCLK_UART>;

	clock-names = "freq", "asc";

};



asc1: serial@e100c00 {

	compatible = "lantiq,asc";

	reg = <0xE100C00 0x400>;

Documentation/devicetree/bindings/serial/renesas,sci-serial.txt

+10 −6
Original line number Diff line number Diff line
@@ -24,6 +24,10 @@ Required properties: 
    - "renesas,hscif-r8a7745" for R8A7745 (RZ/G1E) HSCIF compatible UART.

    - "renesas,scif-r8a77470" for R8A77470 (RZ/G1C) SCIF compatible UART.

    - "renesas,hscif-r8a77470" for R8A77470 (RZ/G1C) HSCIF compatible UART.

    - "renesas,scif-r8a774a1" for R8A774A1 (RZ/G2M) SCIF compatible UART.

    - "renesas,hscif-r8a774a1" for R8A774A1 (RZ/G2M) HSCIF compatible UART.

    - "renesas,scif-r8a774c0" for R8A774C0 (RZ/G2E) SCIF compatible UART.

    - "renesas,hscif-r8a774c0" for R8A774C0 (RZ/G2E) HSCIF compatible UART.

    - "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART.

    - "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART.

    - "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART.
@@ -61,13 +65,13 @@ Required properties: 
    - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART.

    - "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART.

    - "renesas,rcar-gen1-scif" for R-Car Gen1 SCIF compatible UART,

    - "renesas,rcar-gen2-scif" for R-Car Gen2 SCIF compatible UART,

    - "renesas,rcar-gen3-scif" for R-Car Gen3 SCIF compatible UART,

    - "renesas,rcar-gen2-scifa" for R-Car Gen2 SCIFA compatible UART,

    - "renesas,rcar-gen2-scifb" for R-Car Gen2 SCIFB compatible UART,

    - "renesas,rcar-gen2-scif" for R-Car Gen2 and RZ/G1 SCIF compatible UART,

    - "renesas,rcar-gen3-scif" for R-Car Gen3 and RZ/G2 SCIF compatible UART,

    - "renesas,rcar-gen2-scifa" for R-Car Gen2 and RZ/G1 SCIFA compatible UART,

    - "renesas,rcar-gen2-scifb" for R-Car Gen2 and RZ/G1 SCIFB compatible UART,

    - "renesas,rcar-gen1-hscif" for R-Car Gen1 HSCIF compatible UART,

    - "renesas,rcar-gen2-hscif" for R-Car Gen2 HSCIF compatible UART,

    - "renesas,rcar-gen3-hscif" for R-Car Gen3 HSCIF compatible UART,

    - "renesas,rcar-gen2-hscif" for R-Car Gen2 and RZ/G1 HSCIF compatible UART,

    - "renesas,rcar-gen3-hscif" for R-Car Gen3 and RZ/G2 HSCIF compatible UART,

    - "renesas,scif" for generic SCIF compatible UART.

    - "renesas,scifa" for generic SCIFA compatible UART.

    - "renesas,scifb" for generic SCIFB compatible UART.

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