Commit 11710dec authored by Christoffer Dall's avatar Christoffer Dall
Browse files

KVM: arm/arm64: Remove kvm_vgic_inject_mapped_irq 



The only benefit of having kvm_vgic_inject_mapped_irq separate from
kvm_vgic_inject_irq is that we pass a boolean that we use for error
checking on the injection path.

While this could potentially help in some aspect of robustness, it's
also a little bit of a defensive move, and arguably callers into the
vgic should have make sure they have marked their virtual IRQs as mapped
if required.

Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Reviewed-by: default avatarAndre Przywara <andre.przywara@arm.com>
Signed-off-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
parent 9d93dc1c

virt/kvm/arm/arch_timer.c

+2 −1
Original line number Diff line number Diff line
@@ -175,7 +175,8 @@ static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level) 
	timer->irq.level = new_level;

	trace_kvm_timer_update_irq(vcpu->vcpu_id, timer->irq.irq,

				   timer->irq.level);

	ret = kvm_vgic_inject_mapped_irq(vcpu->kvm, vcpu->vcpu_id,



	ret = kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id,

					 timer->irq.irq,

					 timer->irq.level);

	WARN_ON(ret);

virt/kvm/arm/vgic/vgic.c

+16 −34
Original line number Diff line number Diff line
@@ -335,9 +335,22 @@ retry: 
	return true;

}



static int vgic_update_irq_pending(struct kvm *kvm, int cpuid,

				   unsigned int intid, bool level,

				   bool mapped_irq)

/**

 * kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic

 * @kvm:     The VM structure pointer

 * @cpuid:   The CPU for PPIs

 * @intid:   The INTID to inject a new state to.

 * @level:   Edge-triggered:  true:  to trigger the interrupt

 *			      false: to ignore the call

 *	     Level-sensitive  true:  raise the input signal

 *			      false: lower the input signal

 *

 * The VGIC is not concerned with devices being active-LOW or active-HIGH for

 * level-sensitive interrupts.  You can think of the level parameter as 1

 * being HIGH and 0 being LOW and all devices being active-HIGH.

 */

int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,

			bool level)

{

	struct kvm_vcpu *vcpu;

	struct vgic_irq *irq;
@@ -357,11 +370,6 @@ static int vgic_update_irq_pending(struct kvm *kvm, int cpuid, 
	if (!irq)

		return -EINVAL;



	if (irq->hw != mapped_irq) {

		vgic_put_irq(kvm, irq);

		return -EINVAL;

	}



	spin_lock(&irq->irq_lock);



	if (!vgic_validate_injection(irq, level)) {
@@ -382,32 +390,6 @@ static int vgic_update_irq_pending(struct kvm *kvm, int cpuid, 
	return 0;

}



/**

 * kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic

 * @kvm:     The VM structure pointer

 * @cpuid:   The CPU for PPIs

 * @intid:   The INTID to inject a new state to.

 * @level:   Edge-triggered:  true:  to trigger the interrupt

 *			      false: to ignore the call

 *	     Level-sensitive  true:  raise the input signal

 *			      false: lower the input signal

 *

 * The VGIC is not concerned with devices being active-LOW or active-HIGH for

 * level-sensitive interrupts.  You can think of the level parameter as 1

 * being HIGH and 0 being LOW and all devices being active-HIGH.

 */

int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,

			bool level)

{

	return vgic_update_irq_pending(kvm, cpuid, intid, level, false);

}



int kvm_vgic_inject_mapped_irq(struct kvm *kvm, int cpuid, unsigned int intid,

			       bool level)

{

	return vgic_update_irq_pending(kvm, cpuid, intid, level, true);

}



int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, u32 virt_irq, u32 phys_irq)

{

	struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, virt_irq);

CRA Git | Maintained and supported by SUSTech CRA and CCSE