ath9k_hw: Setup paprd only for supported chains (11441fb8) · Commits · 戴 / test

drivers/net/wireless/ath/ath9k/ar9003_paprd.c

+24 −13

Original line number	Diff line number	Diff line
		@@ -21,8 +21,10 @@ void ar9003_paprd_enable(struct ath_hw *ah, bool val)
		{
		REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B0,
		AR_PHY_PAPRD_CTRL0_PAPRD_ENABLE, !!val);
		if (ah->caps.tx_chainmask & BIT(1))
		REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B1,
		AR_PHY_PAPRD_CTRL0_PAPRD_ENABLE, !!val);
		if (ah->caps.tx_chainmask & BIT(2))
		REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B2,
		AR_PHY_PAPRD_CTRL0_PAPRD_ENABLE, !!val);
		}
		@@ -57,7 +59,8 @@ static void ar9003_paprd_setup_single_table(struct ath_hw *ah)
		REG_RMW_FIELD(ah, AR_PHY_PAPRD_AM2PM, AR_PHY_PAPRD_AM2PM_MASK, am_mask);
		REG_RMW_FIELD(ah, AR_PHY_PAPRD_HT40, AR_PHY_PAPRD_HT40_MASK, ht40_mask);

		for (i = 0; i < 3; i++) {

		for (i = 0; i < ah->caps.max_txchains; i++) {
		REG_RMW_FIELD(ah, ctrl0[i],
		AR_PHY_PAPRD_CTRL0_USE_SINGLE_TABLE_MASK, 1);
		REG_RMW_FIELD(ah, ctrl1[i],
		@@ -102,8 +105,14 @@ static void ar9003_paprd_setup_single_table(struct ath_hw *ah)
		AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_NUM_CORR_STAGES, 7);
		REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
		AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_MIN_LOOPBACK_DEL, 1);
		if (AR_SREV_9485(ah))
		REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
		AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP,
		-3);
		else
		REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
		AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP, -6);
		AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP,
		-6);
		REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
		AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE,
		-15);
		@@ -620,10 +629,12 @@ void ar9003_paprd_populate_single_table(struct ath_hw *ah,
		AR_PHY_PAPRD_CTRL1_PAPRD_POWER_AT_AM2AM_CAL,
		training_power);

		if (ah->caps.tx_chainmask & BIT(1))
		REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL1_B1,
		AR_PHY_PAPRD_CTRL1_PAPRD_POWER_AT_AM2AM_CAL,
		training_power);

		if (ah->caps.tx_chainmask & BIT(2))
		REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL1_B2,
		AR_PHY_PAPRD_CTRL1_PAPRD_POWER_AT_AM2AM_CAL,
		training_power);

drivers/net/wireless/ath/ath9k/ar9003_phy.h

+12 −4

Original line number	Diff line number	Diff line
		@@ -987,7 +987,9 @@
		#define AR_PHY_PAPRD_CTRL1_PAPRD_MAG_SCALE_FACT 0x0ffe0000
		#define AR_PHY_PAPRD_CTRL1_PAPRD_MAG_SCALE_FACT_S 17

		#define AR_PHY_PAPRD_TRAINER_CNTL1 (AR_SM_BASE + 0x490)
		#define AR_PHY_PAPRD_TRAINER_CNTL1 (AR_SM_BASE + \
		(AR_SREV_9485(ah) ? \
		0x580 : 0x490))
		#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE 0x00000001
		#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE_S 0
		#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_AGC2_SETTLING 0x0000007e
		@@ -1003,11 +1005,15 @@
		#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_LB_SKIP 0x0003f000
		#define AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_LB_SKIP_S 12

		#define AR_PHY_PAPRD_TRAINER_CNTL2 (AR_SM_BASE + 0x494)
		#define AR_PHY_PAPRD_TRAINER_CNTL2 (AR_SM_BASE + \
		(AR_SREV_9485(ah) ? \
		0x584 : 0x494))
		#define AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN 0xFFFFFFFF
		#define AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN_S 0

		#define AR_PHY_PAPRD_TRAINER_CNTL3 (AR_SM_BASE + 0x498)
		#define AR_PHY_PAPRD_TRAINER_CNTL3 (AR_SM_BASE + \
		(AR_SREV_9485(ah) ? \
		0x588 : 0x498))
		#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE 0x0000003f
		#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE_S 0
		#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP 0x00000fc0
		@@ -1023,7 +1029,9 @@
		#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_BBTXMIX_DISABLE 0x20000000
		#define AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_BBTXMIX_DISABLE_S 29

		#define AR_PHY_PAPRD_TRAINER_CNTL4 (AR_SM_BASE + 0x49c)
		#define AR_PHY_PAPRD_TRAINER_CNTL4 (AR_SM_BASE + \
		(AR_SREV_9485(ah) ? \
		0x58c : 0x49c))
		#define AR_PHY_PAPRD_TRAINER_CNTL4_CF_PAPRD_NUM_TRAIN_SAMPLES 0x03ff0000
		#define AR_PHY_PAPRD_TRAINER_CNTL4_CF_PAPRD_NUM_TRAIN_SAMPLES_S 16
		#define AR_PHY_PAPRD_TRAINER_CNTL4_CF_PAPRD_SAFETY_DELTA 0x0000f000

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