Commit 11260373 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'soc-fsl-next-v5.3' of... 

Merge tag 'soc-fsl-next-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers

NXP/FSL SoC driver updates for v5.3

DPAA2 Console driver
- Add driver to export two char devices to dump logs for MC and
  AIOP

DPAA2 DPIO driver
- Add support for memory backed QBMan portals
- Increase the timeout period to prevent false error
- Add APIs to retrieve QBMan portal probing status

DPAA Qman driver
- Only make liodn fixup on powerpc SoCs with PAMU iommu

* tag 'soc-fsl-next-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux

:
  soc: fsl: qbman_portals: add APIs to retrieve the probing status
  soc: fsl: qman: fixup liodns only on ppc targets
  soc: fsl: dpio: Add support for memory backed QBMan portals
  bus: mc-bus: Add support for mapping shareable portals
  soc: fsl: dpio: Increase timeout for QBMan Management Commands
  soc: fsl: add DPAA2 console support
  Documentation: DT: Add entry for DPAA2 console
  soc: fsl: guts: Add definition for LX2160A

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 9e0babf2 5d1d046e

Documentation/devicetree/bindings/misc/fsl,dpaa2-console.txt

0 → 100644
+11 −0
Original line number Diff line number Diff line 
DPAA2 console support



Required properties:



    - compatible

        Value type: <string>

        Definition: Must be "fsl,dpaa2-console".

    - reg

        Value type: <prop-encoded-array>

        Definition: A standard property.  Specifies the region where the MCFBA

                    (MC firmware base address) register can be found.

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -6416,6 +6416,7 @@ M: Li Yang <leoyang.li@nxp.com> 
L:	linuxppc-dev@lists.ozlabs.org

L:	linux-arm-kernel@lists.infradead.org

S:	Maintained

F:	Documentation/devicetree/bindings/misc/fsl,dpaa2-console.txt

F:	Documentation/devicetree/bindings/soc/fsl/

F:	drivers/soc/fsl/

F:	include/linux/fsl/

drivers/bus/fsl-mc/dprc.c

+27 −3
Original line number Diff line number Diff line
@@ -443,11 +443,31 @@ int dprc_get_obj_region(struct fsl_mc_io *mc_io, 
	struct fsl_mc_command cmd = { 0 };

	struct dprc_cmd_get_obj_region *cmd_params;

	struct dprc_rsp_get_obj_region *rsp_params;

	u16 major_ver, minor_ver;

	int err;



	/* prepare command */

	cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_REG,

	err = dprc_get_api_version(mc_io, 0,

				     &major_ver,

				     &minor_ver);

	if (err)

		return err;



	/**

	 * MC API version 6.3 introduced a new field to the region

	 * descriptor: base_address. If the older API is in use then the base

	 * address is set to zero to indicate it needs to be obtained elsewhere

	 * (typically the device tree).

	 */

	if (major_ver > 6 || (major_ver == 6 && minor_ver >= 3))

		cmd.header =

			mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_REG_V2,

					     cmd_flags, token);

	else

		cmd.header =

			mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_REG,

					     cmd_flags, token);



	cmd_params = (struct dprc_cmd_get_obj_region *)cmd.params;

	cmd_params->obj_id = cpu_to_le32(obj_id);

	cmd_params->region_index = region_index;
@@ -461,8 +481,12 @@ int dprc_get_obj_region(struct fsl_mc_io *mc_io, 


	/* retrieve response parameters */

	rsp_params = (struct dprc_rsp_get_obj_region *)cmd.params;

	region_desc->base_offset = le64_to_cpu(rsp_params->base_addr);

	region_desc->base_offset = le64_to_cpu(rsp_params->base_offset);

	region_desc->size = le32_to_cpu(rsp_params->size);

	if (major_ver > 6 || (major_ver == 6 && minor_ver >= 3))

		region_desc->base_address = le64_to_cpu(rsp_params->base_addr);

	else

		region_desc->base_address = 0;



	return 0;

}

drivers/bus/fsl-mc/fsl-mc-bus.c

+13 −2
Original line number Diff line number Diff line
@@ -487,10 +487,19 @@ static int fsl_mc_device_get_mmio_regions(struct fsl_mc_device *mc_dev, 
				"dprc_get_obj_region() failed: %d\n", error);

			goto error_cleanup_regions;

		}



		/*

		 * Older MC only returned region offset and no base address

		 * If base address is in the region_desc use it otherwise

		 * revert to old mechanism

		 */

		if (region_desc.base_address)

			regions[i].start = region_desc.base_address +

						region_desc.base_offset;

		else

			error = translate_mc_addr(mc_dev, mc_region_type,

					  region_desc.base_offset,

					  &regions[i].start);



		if (error < 0) {

			dev_err(parent_dev,

				"Invalid MC offset: %#x (for %s.%d\'s region %d)\n",
@@ -504,6 +513,8 @@ static int fsl_mc_device_get_mmio_regions(struct fsl_mc_device *mc_dev, 
		regions[i].flags = IORESOURCE_IO;

		if (region_desc.flags & DPRC_REGION_CACHEABLE)

			regions[i].flags |= IORESOURCE_CACHEABLE;

		if (region_desc.flags & DPRC_REGION_SHAREABLE)

			regions[i].flags |= IORESOURCE_MEM;

	}



	mc_dev->regions = regions;

drivers/bus/fsl-mc/fsl-mc-private.h

+15 −2
Original line number Diff line number Diff line
@@ -79,9 +79,11 @@ int dpmcp_reset(struct fsl_mc_io *mc_io, 


/* DPRC command versioning */

#define DPRC_CMD_BASE_VERSION			1

#define DPRC_CMD_2ND_VERSION			2

#define DPRC_CMD_ID_OFFSET			4



#define DPRC_CMD(id)	(((id) << DPRC_CMD_ID_OFFSET) | DPRC_CMD_BASE_VERSION)

#define DPRC_CMD_V2(id)	(((id) << DPRC_CMD_ID_OFFSET) | DPRC_CMD_2ND_VERSION)



/* DPRC command IDs */

#define DPRC_CMDID_CLOSE                        DPRC_CMD(0x800)
@@ -100,6 +102,7 @@ int dpmcp_reset(struct fsl_mc_io *mc_io, 
#define DPRC_CMDID_GET_OBJ_COUNT                DPRC_CMD(0x159)

#define DPRC_CMDID_GET_OBJ                      DPRC_CMD(0x15A)

#define DPRC_CMDID_GET_OBJ_REG                  DPRC_CMD(0x15E)

#define DPRC_CMDID_GET_OBJ_REG_V2               DPRC_CMD_V2(0x15E)

#define DPRC_CMDID_SET_OBJ_IRQ                  DPRC_CMD(0x15F)



struct dprc_cmd_open {
@@ -199,9 +202,16 @@ struct dprc_rsp_get_obj_region { 
	/* response word 0 */

	__le64 pad;

	/* response word 1 */

	__le64 base_addr;

	__le64 base_offset;

	/* response word 2 */

	__le32 size;

	__le32 pad2;

	/* response word 3 */

	__le32 flags;

	__le32 pad3;

	/* response word 4 */

	/* base_addr may be zero if older MC firmware is used */

	__le64 base_addr;

};



struct dprc_cmd_set_obj_irq {
@@ -334,6 +344,7 @@ int dprc_set_obj_irq(struct fsl_mc_io *mc_io, 
/* Region flags */

/* Cacheable - Indicates that region should be mapped as cacheable */

#define DPRC_REGION_CACHEABLE	0x00000001

#define DPRC_REGION_SHAREABLE	0x00000002



/**

 * enum dprc_region_type - Region type
@@ -342,7 +353,8 @@ int dprc_set_obj_irq(struct fsl_mc_io *mc_io, 
 */

enum dprc_region_type {

	DPRC_REGION_TYPE_MC_PORTAL,

	DPRC_REGION_TYPE_QBMAN_PORTAL

	DPRC_REGION_TYPE_QBMAN_PORTAL,

	DPRC_REGION_TYPE_QBMAN_MEM_BACKED_PORTAL

};



/**
@@ -360,6 +372,7 @@ struct dprc_region_desc { 
	u32 size;

	u32 flags;

	enum dprc_region_type type;

	u64 base_address;

};



int dprc_get_obj_region(struct fsl_mc_io *mc_io,

CRA Git | Maintained and supported by SUSTech CRA and CCSE