Commit 111f6fbe authored Feb 03, 2009 by Vasily Khoruzhick Committed by Mark Brown Feb 03, 2009

ASoC: Don't unconditionally use the PLL in UDA1380

Without this fix driver switches to WSPLL in uda1380_pcm_prepare
even if SYSCLK was chosen (uda1380_pcm_prepare modifies UDA1380_CLK
register to disable R00_DAC_CLK before flushing reg cache)

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

parent 39570721

sound/soc/codecs/uda1380.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -418,8 +418,8 @@ static int uda1380_pcm_prepare(struct snd_pcm_substream *substream,
		uda1380_write(codec, reg, uda1380_read_reg_cache(codec, reg));
		}

		/* FIXME enable DAC_CLK */
		uda1380_write(codec, UDA1380_CLK, clk \| R00_DAC_CLK);
		/* FIXME restore DAC_CLK */
		uda1380_write(codec, UDA1380_CLK, clk);

		return 0;
		}