soc: bcm: brcmstb: biuctrl: Change RAC data line prefetching after 4 consecutive lines (10e7dd54) · Commits · 戴 / test

Change the RACPREFDATA(x) setting to prefetch the next 256-byte line after 4 consecutive lines have been used, instead of after 2 consecutive lines. This does improve the synthetic memcpy benchmark by an additional +0.5% on top of the previous change for Cortex-A72 CPUs. Signed-off-by:

Florian Fainelli <f.fainelli@gmail.com>

drivers/soc/bcm/brcmstb/biuctrl.c

+6 −2

Original line number	Diff line number	Diff line
		@@ -174,7 +174,7 @@ static const u32 a72_b53_mach_compat[] = {
		static void __init a72_b53_rac_enable_all(struct device_node *np)
		{
		unsigned int cpu;
		u32 enable = 0, pref_dist;
		u32 enable = 0, pref_dist, shift;

		if (IS_ENABLED(CONFIG_CACHE_B15_RAC))
		return;
		@@ -184,10 +184,14 @@ static void __init a72_b53_rac_enable_all(struct device_node *np)

		pref_dist = cbc_readl(RAC_CONFIG1_REG);
		for_each_possible_cpu(cpu) {
		shift = cpu * RAC_CPU_SHIFT + RACPREFDATA_SHIFT;
		enable \|= RAC_DATA_INST_EN_MASK << (cpu * RAC_CPU_SHIFT);
		if (cpubiuctrl_regs == a72_cpubiuctrl_regs)
		if (cpubiuctrl_regs == a72_cpubiuctrl_regs) {
		enable &= ~(RACENPREF_MASK << shift);
		enable \|= 3 << shift;
		pref_dist \|= 1 << (cpu + DPREF_LINE_2_SHIFT);
		}
		}

		cbc_writel(enable, RAC_CONFIG0_REG);
		cbc_writel(pref_dist, RAC_CONFIG1_REG);

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