ARM: shmobile: sh7372: Remove ZBOOT MMC/SDHI support (10c7fcbd) · Commits · 戴 / test

arch/arm/Kconfig

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Original line number	Diff line number	Diff line
		@@ -1848,35 +1848,6 @@ config ZBOOT_ROM
		Say Y here if you intend to execute your compressed kernel image
		(zImage) directly from ROM or flash. If unsure, say N.

		choice
		prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
		depends on ZBOOT_ROM && ARCH_SH7372
		default ZBOOT_ROM_NONE
		help
		Include experimental SD/MMC loading code in the ROM-able zImage.
		With this enabled it is possible to write the ROM-able zImage
		kernel image to an MMC or SD card and boot the kernel straight
		from the reset vector. At reset the processor Mask ROM will load
		the first part of the ROM-able zImage which in turn loads the
		rest the kernel image to RAM.

		config ZBOOT_ROM_NONE
		bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
		help
		Do not load image from SD or MMC

		config ZBOOT_ROM_MMCIF
		bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
		help
		Load image from MMCIF hardware block.

		config ZBOOT_ROM_SH_MOBILE_SDHI
		bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
		help
		Load image from SDHI hardware block

		endchoice

		config ARM_APPENDED_DTB
		bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
		depends on OF

arch/arm/boot/compressed/Makefile

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Original line number	Diff line number	Diff line
		@@ -6,21 +6,6 @@

		OBJS =

		# Ensure that MMCIF loader code appears early in the image
		# to minimise that number of bocks that have to be read in
		# order to load it.
		ifeq ($(CONFIG_ZBOOT_ROM_MMCIF),y)
		OBJS += mmcif-sh7372.o
		endif

		# Ensure that SDHI loader code appears early in the image
		# to minimise that number of bocks that have to be read in
		# order to load it.
		ifeq ($(CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI),y)
		OBJS += sdhi-shmobile.o
		OBJS += sdhi-sh7372.o
		endif

		AFLAGS_head.o += -DTEXT_OFFSET=$(TEXT_OFFSET)
		HEAD = head.o
		OBJS += misc.o decompress.o

arch/arm/boot/compressed/head-shmobile.S

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Original line number	Diff line number	Diff line
		@@ -25,36 +25,6 @@
		/* load board-specific initialization code */
		#include <mach/zboot.h>

		#if defined(CONFIG_ZBOOT_ROM_MMCIF) \|\| defined(CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI)
		/* Load image from MMC/SD */
		adr sp, __tmp_stack + 256
		ldr r0, __image_start
		ldr r1, __image_end
		subs r1, r1, r0
		ldr r0, __load_base
		bl mmc_loader

		/* Jump to loaded code */
		ldr r0, __loaded
		ldr r1, __image_start
		sub r0, r0, r1
		ldr r1, __load_base
		add pc, r0, r1

		__image_start:
		.long _start
		__image_end:
		.long _got_end
		__load_base:
		.long MEMORY_START + 0x02000000 @ Load at 32Mb into SDRAM
		__loaded:
		.long __continue
		.align
		__tmp_stack:
		.space 256
		__continue:
		#endif /* CONFIG_ZBOOT_ROM_MMC \|\| CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI */

		adr r0, dtb_info
		ldmia r0, {r1, r3, r4, r5, r7}

arch/arm/boot/compressed/mmcif-sh7372.c

deleted100644 → 0

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Original line number	Diff line number	Diff line
		/*
		* sh7372 MMCIF loader
		*
		* Copyright (C) 2010 Magnus Damm
		* Copyright (C) 2010 Simon Horman
		*
		* This file is subject to the terms and conditions of the GNU General Public
		* License. See the file "COPYING" in the main directory of this archive
		* for more details.
		*/

		#include <linux/mmc/sh_mmcif.h>
		#include <linux/mmc/boot.h>
		#include <mach/mmc.h>

		#define MMCIF_BASE (void __iomem *)0xe6bd0000

		#define PORT84CR (void __iomem *)0xe6050054
		#define PORT85CR (void __iomem *)0xe6050055
		#define PORT86CR (void __iomem *)0xe6050056
		#define PORT87CR (void __iomem *)0xe6050057
		#define PORT88CR (void __iomem *)0xe6050058
		#define PORT89CR (void __iomem *)0xe6050059
		#define PORT90CR (void __iomem *)0xe605005a
		#define PORT91CR (void __iomem *)0xe605005b
		#define PORT92CR (void __iomem *)0xe605005c
		#define PORT99CR (void __iomem *)0xe6050063

		#define SMSTPCR3 (void __iomem *)0xe615013c

		/* SH7372 specific MMCIF loader
		*
		* loads the zImage from an MMC card starting from block 1.
		*
		* The image must be start with a vrl4 header and
		* the zImage must start at offset 512 of the image. That is,
		* at block 2 (=byte 1024) on the media
		*
		* Use the following line to write the vrl4 formated zImage
		* to an MMC card
		* # dd if=vrl4.out of=/dev/sdx bs=512 seek=1
		*/
		asmlinkage void mmc_loader(unsigned char *buf, unsigned long len)
		{
		mmc_init_progress();
		mmc_update_progress(MMC_PROGRESS_ENTER);

		/* Initialise MMC
		* registers: PORT84CR-PORT92CR
		* (MMCD0_0-MMCD0_7,MMCCMD0 Control)
		* value: 0x04 - select function 4
		*/
		__raw_writeb(0x04, PORT84CR);
		__raw_writeb(0x04, PORT85CR);
		__raw_writeb(0x04, PORT86CR);
		__raw_writeb(0x04, PORT87CR);
		__raw_writeb(0x04, PORT88CR);
		__raw_writeb(0x04, PORT89CR);
		__raw_writeb(0x04, PORT90CR);
		__raw_writeb(0x04, PORT91CR);
		__raw_writeb(0x04, PORT92CR);

		/* Initialise MMC
		* registers: PORT99CR (MMCCLK0 Control)
		* value: 0x10 \| 0x04 - enable output \| select function 4
		*/
		__raw_writeb(0x14, PORT99CR);

		/* Enable clock to MMC hardware block */
		__raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 12), SMSTPCR3);

		mmc_update_progress(MMC_PROGRESS_INIT);

		/* setup MMCIF hardware */
		sh_mmcif_boot_init(MMCIF_BASE);

		mmc_update_progress(MMC_PROGRESS_LOAD);

		/* load kernel via MMCIF interface */
		sh_mmcif_boot_do_read(MMCIF_BASE, 2, /* Kernel is at block 2 */
		(len + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS, buf);


		/* Disable clock to MMC hardware block */
		__raw_writel(__raw_readl(SMSTPCR3) \| (1 << 12), SMSTPCR3);

		mmc_update_progress(MMC_PROGRESS_DONE);
		}

arch/arm/boot/compressed/sdhi-sh7372.c

deleted100644 → 0

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Original line number	Diff line number	Diff line
		/*
		* SuperH Mobile SDHI
		*
		* Copyright (C) 2010 Magnus Damm
		* Copyright (C) 2010 Kuninori Morimoto
		* Copyright (C) 2010 Simon Horman
		*
		* This file is subject to the terms and conditions of the GNU General Public
		* License. See the file "COPYING" in the main directory of this archive
		* for more details.
		*
		* Parts inspired by u-boot
		*/

		#include <linux/io.h>
		#include <mach/mmc.h>
		#include <linux/mmc/boot.h>
		#include <linux/mmc/tmio.h>

		#include "sdhi-shmobile.h"

		#define PORT179CR 0xe60520b3
		#define PORT180CR 0xe60520b4
		#define PORT181CR 0xe60520b5
		#define PORT182CR 0xe60520b6
		#define PORT183CR 0xe60520b7
		#define PORT184CR 0xe60520b8

		#define SMSTPCR3 0xe615013c

		#define CR_INPUT_ENABLE 0x10
		#define CR_FUNCTION1 0x01

		#define SDHI1_BASE (void __iomem *)0xe6860000
		#define SDHI_BASE SDHI1_BASE

		/* SuperH Mobile SDHI loader
		*
		* loads the zImage from an SD card starting from block 0
		* on physical partition 1
		*
		* The image must be start with a vrl4 header and
		* the zImage must start at offset 512 of the image. That is,
		* at block 1 (=byte 512) of physical partition 1
		*
		* Use the following line to write the vrl4 formated zImage
		* to an SD card
		* # dd if=vrl4.out of=/dev/sdx bs=512
		*/
		asmlinkage void mmc_loader(unsigned short *buf, unsigned long len)
		{
		int high_capacity;

		mmc_init_progress();

		mmc_update_progress(MMC_PROGRESS_ENTER);
		/* Initialise SDHI1 */
		/* PORT184CR: GPIO_FN_SDHICMD1 Control */
		__raw_writeb(CR_FUNCTION1, PORT184CR);
		/* PORT179CR: GPIO_FN_SDHICLK1 Control */
		__raw_writeb(CR_INPUT_ENABLE\|CR_FUNCTION1, PORT179CR);
		/* PORT181CR: GPIO_FN_SDHID1_3 Control */
		__raw_writeb(CR_FUNCTION1, PORT183CR);
		/* PORT182CR: GPIO_FN_SDHID1_2 Control */
		__raw_writeb(CR_FUNCTION1, PORT182CR);
		/* PORT183CR: GPIO_FN_SDHID1_1 Control */
		__raw_writeb(CR_FUNCTION1, PORT181CR);
		/* PORT180CR: GPIO_FN_SDHID1_0 Control */
		__raw_writeb(CR_FUNCTION1, PORT180CR);

		/* Enable clock to SDHI1 hardware block */
		__raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 13), SMSTPCR3);

		/* setup SDHI hardware */
		mmc_update_progress(MMC_PROGRESS_INIT);
		high_capacity = sdhi_boot_init(SDHI_BASE);
		if (high_capacity < 0)
		goto err;

		mmc_update_progress(MMC_PROGRESS_LOAD);
		/* load kernel */
		if (sdhi_boot_do_read(SDHI_BASE, high_capacity,
		0, /* Kernel is at block 1 */
		(len + TMIO_BBS - 1) / TMIO_BBS, buf))
		goto err;

		/* Disable clock to SDHI1 hardware block */
		__raw_writel(__raw_readl(SMSTPCR3) \| (1 << 13), SMSTPCR3);

		mmc_update_progress(MMC_PROGRESS_DONE);

		return;
		err:
		for(;;);
		}

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