Commit 10baf04e authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux: (35 commits)
  PM idle: remove global declaration of pm_idle
  unicore32 idle: delete stray pm_idle comment
  openrisc idle: delete pm_idle
  mn10300 idle: delete pm_idle
  microblaze idle: delete pm_idle
  m32r idle: delete pm_idle, and other dead idle code
  ia64 idle: delete pm_idle
  cris idle: delete idle and pm_idle
  ARM64 idle: delete pm_idle
  ARM idle: delete pm_idle
  blackfin idle: delete pm_idle
  sparc idle: rename pm_idle to sparc_idle
  sh idle: rename global pm_idle to static sh_idle
  x86 idle: rename global pm_idle to static x86_idle
  APM idle: register apm_cpu_idle via cpuidle
  tools/power turbostat: display SMI count by default
  intel_idle: export both C1 and C1E
  cpuidle: remove vestage definition of cpuidle_state_usage.driver_data
  x86 idle: remove 32-bit-only "no-hlt" parameter, hlt_works_ok flag
  x86 idle: remove mwait_idle() and "idle=mwait" cmdline param
  ...

Conflicts:
	arch/x86/kernel/process.c (with PM / tracing commit 43720bd6)
	drivers/acpi/processor_idle.c (with ACPICA commit 4f842916)
parents fdbe0946 ca62cf59
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+1 −10
Original line number Diff line number Diff line
@@ -1039,16 +1039,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
			Claim all unknown PCI IDE storage controllers.

	idle=		[X86]
			Format: idle=poll, idle=mwait, idle=halt, idle=nomwait
			Format: idle=poll, idle=halt, idle=nomwait
			Poll forces a polling idle loop that can slightly
			improve the performance of waking up a idle CPU, but
			will use a lot of power and make the system run hot.
			Not recommended.
			idle=mwait: On systems which support MONITOR/MWAIT but
			the kernel chose to not use it because it doesn't save
			as much power as a normal idle loop, use the
			MONITOR/MWAIT idle loop anyways. Performance should be
			the same as idle=poll.
			idle=halt: Halt is forced to be used for CPU idle.
			In such case C2/C3 won't be used again.
			idle=nomwait: Disable mwait for CPU C-states
@@ -1891,10 +1886,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
			wfi(ARM) instruction doesn't work correctly and not to
			use it. This is also useful when using JTAG debugger.

	no-hlt		[BUGS=X86-32] Tells the kernel that the hlt
			instruction doesn't work correctly and not to
			use it.

	no_file_caps	Tells the kernel not to honor file capabilities.  The
			only way then for a file to be executed with privilege
			is to be setuid root or executed by root.
+4 −9
Original line number Diff line number Diff line
@@ -172,14 +172,9 @@ static void default_idle(void)
	local_irq_enable();
}

void (*pm_idle)(void) = default_idle;
EXPORT_SYMBOL(pm_idle);

/*
 * The idle thread, has rather strange semantics for calling pm_idle,
 * but this is what x86 does and we need to do the same, so that
 * things like cpuidle get called in the same way.  The only difference
 * is that we always respect 'hlt_counter' to prevent low power idle.
 * The idle thread.
 * We always respect 'hlt_counter' to prevent low power idle.
 */
void cpu_idle(void)
{
@@ -210,10 +205,10 @@ void cpu_idle(void)
			} else if (!need_resched()) {
				stop_critical_timings();
				if (cpuidle_idle_call())
					pm_idle();
					default_idle();
				start_critical_timings();
				/*
				 * pm_idle functions must always
				 * default_idle functions must always
				 * return with IRQs enabled.
				 */
				WARN_ON(irqs_disabled());
+25 −59
Original line number Diff line number Diff line
@@ -25,35 +25,44 @@

#define DAVINCI_CPUIDLE_MAX_STATES	2

struct davinci_ops {
	void (*enter) (u32 flags);
	void (*exit) (u32 flags);
	u32 flags;
};
static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
static void __iomem *ddr2_reg_base;
static bool ddr2_pdown;

static void davinci_save_ddr_power(int enter, bool pdown)
{
	u32 val;

	val = __raw_readl(ddr2_reg_base + DDR2_SDRCR_OFFSET);

	if (enter) {
		if (pdown)
			val |= DDR2_SRPD_BIT;
		else
			val &= ~DDR2_SRPD_BIT;
		val |= DDR2_LPMODEN_BIT;
	} else {
		val &= ~(DDR2_SRPD_BIT | DDR2_LPMODEN_BIT);
	}

	__raw_writel(val, ddr2_reg_base + DDR2_SDRCR_OFFSET);
}

/* Actual code that puts the SoC in different idle states */
static int davinci_enter_idle(struct cpuidle_device *dev,
				struct cpuidle_driver *drv,
						int index)
{
	struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
	struct davinci_ops *ops = cpuidle_get_statedata(state_usage);

	if (ops && ops->enter)
		ops->enter(ops->flags);
	davinci_save_ddr_power(1, ddr2_pdown);

	index = cpuidle_wrap_enter(dev,	drv, index,
				arm_cpuidle_simple_enter);

	if (ops && ops->exit)
		ops->exit(ops->flags);
	davinci_save_ddr_power(0, ddr2_pdown);

	return index;
}

/* fields in davinci_ops.flags */
#define DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN	BIT(0)

static struct cpuidle_driver davinci_idle_driver = {
	.name			= "cpuidle-davinci",
	.owner			= THIS_MODULE,
@@ -70,45 +79,6 @@ static struct cpuidle_driver davinci_idle_driver = {
	.state_count = DAVINCI_CPUIDLE_MAX_STATES,
};

static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
static void __iomem *ddr2_reg_base;

static void davinci_save_ddr_power(int enter, bool pdown)
{
	u32 val;

	val = __raw_readl(ddr2_reg_base + DDR2_SDRCR_OFFSET);

	if (enter) {
		if (pdown)
			val |= DDR2_SRPD_BIT;
		else
			val &= ~DDR2_SRPD_BIT;
		val |= DDR2_LPMODEN_BIT;
	} else {
		val &= ~(DDR2_SRPD_BIT | DDR2_LPMODEN_BIT);
	}

	__raw_writel(val, ddr2_reg_base + DDR2_SDRCR_OFFSET);
}

static void davinci_c2state_enter(u32 flags)
{
	davinci_save_ddr_power(1, !!(flags & DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN));
}

static void davinci_c2state_exit(u32 flags)
{
	davinci_save_ddr_power(0, !!(flags & DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN));
}

static struct davinci_ops davinci_states[DAVINCI_CPUIDLE_MAX_STATES] = {
	[1] = {
		.enter	= davinci_c2state_enter,
		.exit	= davinci_c2state_exit,
	},
};

static int __init davinci_cpuidle_probe(struct platform_device *pdev)
{
	int ret;
@@ -124,11 +94,7 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev)

	ddr2_reg_base = pdata->ddr2_ctlr_base;

	if (pdata->ddr2_pdown)
		davinci_states[1].flags |= DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN;
	cpuidle_set_statedata(&device->states_usage[1], &davinci_states[1]);

	device->state_count = DAVINCI_CPUIDLE_MAX_STATES;
	ddr2_pdown = pdata->ddr2_pdown;

	ret = cpuidle_register_driver(&davinci_idle_driver);
	if (ret) {
+4 −9
Original line number Diff line number Diff line
@@ -97,14 +97,9 @@ static void default_idle(void)
	local_irq_enable();
}

void (*pm_idle)(void) = default_idle;
EXPORT_SYMBOL_GPL(pm_idle);

/*
 * The idle thread, has rather strange semantics for calling pm_idle,
 * but this is what x86 does and we need to do the same, so that
 * things like cpuidle get called in the same way.  The only difference
 * is that we always respect 'hlt_counter' to prevent low power idle.
 * The idle thread.
 * We always respect 'hlt_counter' to prevent low power idle.
 */
void cpu_idle(void)
{
@@ -122,10 +117,10 @@ void cpu_idle(void)
			local_irq_disable();
			if (!need_resched()) {
				stop_critical_timings();
				pm_idle();
				default_idle();
				start_critical_timings();
				/*
				 * pm_idle functions should always return
				 * default_idle functions should always return
				 * with IRQs enabled.
				 */
				WARN_ON(irqs_disabled());
+0 −7
Original line number Diff line number Diff line
@@ -39,12 +39,6 @@ int nr_l1stack_tasks;
void *l1_stack_base;
unsigned long l1_stack_len;

/*
 * Powermanagement idle function, if any..
 */
void (*pm_idle)(void) = NULL;
EXPORT_SYMBOL(pm_idle);

void (*pm_power_off)(void) = NULL;
EXPORT_SYMBOL(pm_power_off);

@@ -81,7 +75,6 @@ void cpu_idle(void)
{
	/* endless idle loop with no priority at all */
	while (1) {
		void (*idle)(void) = pm_idle;

#ifdef CONFIG_HOTPLUG_CPU
		if (cpu_is_offline(smp_processor_id()))
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