Commit 10a7b37b authored by Thierry Reding's avatar Thierry Reding
Browse files

arm64: Update default configuration 



Enable a couple of drivers that are used on Jetson TX1:

  * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO
    expander are used on Jetson TX1 to expand the number of usable GPIOs
    on the I/O board. Enable the driver for this expander along with IRQ
    support.

  * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620,
    RTC_DRV_MAX77686: Enable support for the PMIC and various of its
    components found on the Jetson TX1 processor module (p2180).

  * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on
    boards, but it can be useful as a wakeup source from suspend to RAM.

  * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one
    of the Tegra's PWM channels.

  * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an
    optional DSI panel on Jetson TX1 as well as the GPU.

  * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if
    shipped with a display module, is driver by an LP8557.

  * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on
    Jetson TX1.

  * PWM, PWM_TEGRA: One of the PWM channels is used to control the
    voltage supplied to the GPU.

  * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol
    to increase compatibility with distributions.

  * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable
    the ChromeOS Embedded Controller and the I2C tunnel that allows the
    EC to function as an I2C bridge.

  * BATTERY_BQ27XXX: Support the battery charger and monitor found on
    the Google Pixel C.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 1a695a90

arch/arm64/configs/defconfig

+25 −0
Original line number Diff line number Diff line
@@ -178,6 +178,7 @@ CONFIG_I2C_QUP=y 
CONFIG_I2C_TEGRA=y

CONFIG_I2C_UNIPHIER_F=y

CONFIG_I2C_RCAR=y

CONFIG_I2C_CROS_EC_TUNNEL=y

CONFIG_SPI=y

CONFIG_SPI_ORION=y

CONFIG_SPI_PL022=y
@@ -185,6 +186,7 @@ CONFIG_SPI_QUP=y 
CONFIG_SPI_SPIDEV=m

CONFIG_SPMI=y

CONFIG_PINCTRL_SINGLE=y

CONFIG_PINCTRL_MAX77620=y

CONFIG_PINCTRL_MSM8916=y

CONFIG_PINCTRL_QCOM_SPMI_PMIC=y

CONFIG_GPIO_SYSFS=y
@@ -192,7 +194,11 @@ CONFIG_GPIO_DWAPB=y 
CONFIG_GPIO_PL061=y

CONFIG_GPIO_RCAR=y

CONFIG_GPIO_XGENE=y

CONFIG_GPIO_PCA953X=y

CONFIG_GPIO_PCA953X_IRQ=y

CONFIG_GPIO_MAX77620=y

CONFIG_POWER_RESET_MSM=y

CONFIG_BATTERY_BQ27XXX=y

CONFIG_POWER_RESET_XGENE=y

CONFIG_POWER_RESET_SYSCON=y

CONFIG_SENSORS_LM90=m
@@ -202,17 +208,28 @@ CONFIG_THERMAL_EMULATION=y 
CONFIG_EXYNOS_THERMAL=y

CONFIG_WATCHDOG=y

CONFIG_RENESAS_WDT=y

CONFIG_MFD_MAX77620=y

CONFIG_MFD_SPMI_PMIC=y

CONFIG_MFD_SEC_CORE=y

CONFIG_MFD_HI655X_PMIC=y

CONFIG_REGULATOR=y

CONFIG_MFD_CROS_EC=y

CONFIG_MFD_CROS_EC_I2C=y

CONFIG_REGULATOR_FIXED_VOLTAGE=y

CONFIG_REGULATOR_HI655X=y

CONFIG_REGULATOR_MAX77620=y

CONFIG_REGULATOR_PWM=y

CONFIG_REGULATOR_QCOM_SMD_RPM=y

CONFIG_REGULATOR_QCOM_SPMI=y

CONFIG_REGULATOR_S2MPS11=y

CONFIG_DRM=m

CONFIG_DRM_NOUVEAU=m

CONFIG_DRM_TEGRA=m

CONFIG_DRM_PANEL_SIMPLE=m

CONFIG_FB=y

CONFIG_FB_ARMCLCD=y

CONFIG_BACKLIGHT_GENERIC=m

CONFIG_BACKLIGHT_LP855X=m

CONFIG_FRAMEBUFFER_CONSOLE=y

CONFIG_LOGO=y

# CONFIG_LOGO_LINUX_MONO is not set
@@ -226,6 +243,7 @@ CONFIG_USB=y 
CONFIG_USB_OTG=y

CONFIG_USB_XHCI_HCD=y

CONFIG_USB_XHCI_RCAR=y

CONFIG_USB_XHCI_TEGRA=y

CONFIG_USB_EHCI_HCD=y

CONFIG_USB_EHCI_MSM=y

CONFIG_USB_EHCI_HCD_PLATFORM=y
@@ -262,11 +280,13 @@ CONFIG_LEDS_TRIGGERS=y 
CONFIG_LEDS_TRIGGER_HEARTBEAT=y

CONFIG_LEDS_TRIGGER_CPU=y

CONFIG_RTC_CLASS=y

CONFIG_RTC_DRV_MAX77686=y

CONFIG_RTC_DRV_S5M=y

CONFIG_RTC_DRV_DS3232=y

CONFIG_RTC_DRV_EFI=y

CONFIG_RTC_DRV_PL031=y

CONFIG_RTC_DRV_SUN6I=y

CONFIG_RTC_DRV_TEGRA=y

CONFIG_RTC_DRV_XGENE=y

CONFIG_DMADEVICES=y

CONFIG_PL330_DMA=y
@@ -296,10 +316,13 @@ CONFIG_QCOM_SMD_RPM=y 
CONFIG_ARCH_TEGRA_132_SOC=y

CONFIG_ARCH_TEGRA_210_SOC=y

CONFIG_EXTCON_USB_GPIO=y

CONFIG_PWM=y

CONFIG_PWM_TEGRA=m

CONFIG_COMMON_RESET_HI6220=y

CONFIG_PHY_RCAR_GEN3_USB2=y

CONFIG_PHY_HI6220_USB=y

CONFIG_PHY_XGENE=y

CONFIG_PHY_TEGRA_XUSB=y

CONFIG_ARM_SCPI_PROTOCOL=y

CONFIG_ACPI=y

CONFIG_EXT2_FS=y
@@ -318,6 +341,8 @@ CONFIG_EFIVAR_FS=y 
CONFIG_SQUASHFS=y

CONFIG_NFS_FS=y

CONFIG_NFS_V4=y

CONFIG_NFS_V4_1=y

CONFIG_NFS_V4_2=y

CONFIG_ROOT_NFS=y

CONFIG_9P_FS=y

CONFIG_NLS_CODEPAGE_437=y

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