Commit 1068ed45 authored by Borislav Petkov's avatar Borislav Petkov
Browse files

x86/msr: Lift AMD family 0x15 power-specific MSRs 



... into the global msr-index.h header because they're used in multiple
compilation units. Sort the MSR list a bit. Update the msr-index.h copy
in tools.

No functional changes.

Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Acked-by: default avatarGuenter Roeck <linux@roeck-us.net>
Link: https://lkml.kernel.org/r/20200608164847.14232-1-bp@alien8.de
parent b3a9e3b9

arch/x86/events/amd/power.c

+0 −4
Original line number Diff line number Diff line
@@ -13,10 +13,6 @@ 
#include <asm/cpu_device_id.h>

#include "../perf_event.h"



#define MSR_F15H_CU_PWR_ACCUMULATOR     0xc001007a

#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b

#define MSR_F15H_PTSC			0xc0010280



/* Event code: LSB 8 bits, passed in attr->config any other bit is reserved. */

#define AMD_POWER_EVENT_MASK		0xFFULL

arch/x86/include/asm/msr-index.h

+4 −1
Original line number Diff line number Diff line
@@ -418,15 +418,18 @@ 
#define MSR_AMD64_PATCH_LEVEL		0x0000008b

#define MSR_AMD64_TSC_RATIO		0xc0000104

#define MSR_AMD64_NB_CFG		0xc001001f

#define MSR_AMD64_CPUID_FN_1		0xc0011004

#define MSR_AMD64_PATCH_LOADER		0xc0010020

#define MSR_AMD_PERF_CTL		0xc0010062

#define MSR_AMD_PERF_STATUS		0xc0010063

#define MSR_AMD_PSTATE_DEF_BASE		0xc0010064

#define MSR_F15H_CU_PWR_ACCUMULATOR     0xc001007a

#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b

#define MSR_AMD64_OSVW_ID_LENGTH	0xc0010140

#define MSR_AMD64_OSVW_STATUS		0xc0010141

#define MSR_F15H_PTSC			0xc0010280

#define MSR_AMD_PPIN_CTL		0xc00102f0

#define MSR_AMD_PPIN			0xc00102f1

#define MSR_AMD64_CPUID_FN_1		0xc0011004

#define MSR_AMD64_LS_CFG		0xc0011020

#define MSR_AMD64_DC_CFG		0xc0011022

#define MSR_AMD64_BU_CFG2		0xc001102a

drivers/hwmon/fam15h_power.c

+0 −4
Original line number Diff line number Diff line
@@ -41,10 +41,6 @@ MODULE_LICENSE("GPL"); 
/* set maximum interval as 1 second */

#define MAX_INTERVAL			1000



#define MSR_F15H_CU_PWR_ACCUMULATOR	0xc001007a

#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR	0xc001007b

#define MSR_F15H_PTSC			0xc0010280



#define PCI_DEVICE_ID_AMD_15H_M70H_NB_F4 0x15b4



struct fam15h_power_data {

tools/arch/x86/include/asm/msr-index.h

+4 −1
Original line number Diff line number Diff line
@@ -414,15 +414,18 @@ 
#define MSR_AMD64_PATCH_LEVEL		0x0000008b

#define MSR_AMD64_TSC_RATIO		0xc0000104

#define MSR_AMD64_NB_CFG		0xc001001f

#define MSR_AMD64_CPUID_FN_1		0xc0011004

#define MSR_AMD64_PATCH_LOADER		0xc0010020

#define MSR_AMD_PERF_CTL		0xc0010062

#define MSR_AMD_PERF_STATUS		0xc0010063

#define MSR_AMD_PSTATE_DEF_BASE		0xc0010064

#define MSR_F15H_CU_PWR_ACCUMULATOR     0xc001007a

#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b

#define MSR_AMD64_OSVW_ID_LENGTH	0xc0010140

#define MSR_AMD64_OSVW_STATUS		0xc0010141

#define MSR_F15H_PTSC			0xc0010280

#define MSR_AMD_PPIN_CTL		0xc00102f0

#define MSR_AMD_PPIN			0xc00102f1

#define MSR_AMD64_CPUID_FN_1		0xc0011004

#define MSR_AMD64_LS_CFG		0xc0011020

#define MSR_AMD64_DC_CFG		0xc0011022

#define MSR_AMD64_BU_CFG2		0xc001102a

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