Commit 101dd590 authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
Browse files

powerpc/perf: Avoid spurious PMU interrupts after idle 



POWER9 DD2 can see spurious PMU interrupts after state-loss idle in
some conditions.

A solution is to save and reload MMCR0 over state-loss idle.

Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Acked-by: default avatarMadhavan Srinivasan <maddy@linux.vnet.ibm.com>
Tested-by: default avatarAnton Blanchard <anton@samba.org>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent a70b487b

arch/powerpc/kernel/idle_book3s.S

+14 −1
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ 
 * Use unused space in the interrupt stack to save and restore

 * registers for winkle support.

 */

#define _MMCR0	GPR0

#define _SDR1	GPR3

#define _PTCR	GPR3

#define _RPR	GPR4
@@ -272,6 +273,14 @@ power_enter_stop: 
	b 	pnv_wakeup_noloss



.Lhandle_esl_ec_set:

	/*

	 * POWER9 DD2 can incorrectly set PMAO when waking up after a

	 * state-loss idle. Saving and restoring MMCR0 over idle is a

	 * workaround.

	 */

	mfspr	r4,SPRN_MMCR0

	std	r4,_MMCR0(r1)



/*

 * Check if the requested state is a deep idle state.

 */
@@ -450,10 +459,14 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300) 
pnv_restore_hyp_resource_arch300:

	/*

	 * Workaround for POWER9, if we lost resources, the ERAT

	 * might have been mixed up and needs flushing.

	 * might have been mixed up and needs flushing. We also need

	 * to reload MMCR0 (see comment above).

	 */

	blt	cr3,1f

	PPC_INVALIDATE_ERAT

	ld	r1,PACAR1(r13)

	ld	r4,_MMCR0(r1)

	mtspr	SPRN_MMCR0,r4

1:

	/*

	 * POWER ISA 3. Use PSSCR to determine if we

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