drm/amd/powerplay: add set_power_profile_mode for raven1_refresh (1019fe04) · Commits · 戴 / test

drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -92,6 +92,7 @@ int hwmgr_early_init(struct pp_hwmgr *hwmgr)
		hwmgr_set_user_specify_caps(hwmgr);
		hwmgr->fan_ctrl_is_in_default_mode = true;
		hwmgr_init_workload_prority(hwmgr);
		hwmgr->gfxoff_state_changed_by_workload = false;

		switch (hwmgr->chip_family) {
		case AMDGPU_FAMILY_CI:

+28 −3

Original line number	Diff line number	Diff line
		@@ -1258,21 +1258,46 @@ static int smu10_get_power_profile_mode(struct pp_hwmgr hwmgr, char buf)
		return size;
		}

		static bool smu10_is_raven1_refresh(struct pp_hwmgr *hwmgr)
		{
		struct amdgpu_device *adev = hwmgr->adev;
		if ((adev->asic_type == CHIP_RAVEN) &&
		(adev->rev_id != 0x15d8) &&
		(hwmgr->smu_version >= 0x41e2b))
		return true;
		else
		return false;
		}

		static int smu10_set_power_profile_mode(struct pp_hwmgr hwmgr, long input, uint32_t size)
		{
		int workload_type = 0;
		int result = 0;

		if (input[size] > PP_SMC_POWER_PROFILE_COMPUTE) {
		pr_err("Invalid power profile mode %ld\n", input[size]);
		return -EINVAL;
		}
		hwmgr->power_profile_mode = input[size];
		if (hwmgr->power_profile_mode == input[size])
		return 0;

		/* conv PP_SMC_POWER_PROFILE* to WORKLOAD_PPLIB__BIT /
		workload_type =
		conv_power_profile_to_pplib_workload(hwmgr->power_profile_mode);
		smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_ActiveProcessNotify,
		conv_power_profile_to_pplib_workload(input[size]);
		if (workload_type &&
		smu10_is_raven1_refresh(hwmgr) &&
		!hwmgr->gfxoff_state_changed_by_workload) {
		smu10_gfx_off_control(hwmgr, false);
		hwmgr->gfxoff_state_changed_by_workload = true;
		}
		result = smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_ActiveProcessNotify,
		1 << workload_type);
		if (!result)
		hwmgr->power_profile_mode = input[size];
		if (workload_type && hwmgr->gfxoff_state_changed_by_workload) {
		smu10_gfx_off_control(hwmgr, true);
		hwmgr->gfxoff_state_changed_by_workload = false;
		}

		return 0;
		}

+1 −0

Original line number	Diff line number	Diff line
		@@ -782,6 +782,7 @@ struct pp_hwmgr {
		uint32_t workload_mask;
		uint32_t workload_prority[Workload_Policy_Max];
		uint32_t workload_setting[Workload_Policy_Max];
		bool gfxoff_state_changed_by_workload;
		};

		int hwmgr_early_init(struct pp_hwmgr *hwmgr);