Commit 0fbae9d2 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Clean up encoder->crtc_mask setup 



Use BIT(pipe) for better legibility when populating the crtc_mask
for encoders.

Also remove the redundant possible_crtcs setup for the TV encoder.

Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190708162048.4286-11-ville.syrjala@linux.intel.com
parent ed500bf6

drivers/gpu/drm/i915/display/intel_crt.c

+2 −2
Original line number Diff line number Diff line
@@ -994,9 +994,9 @@ void intel_crt_init(struct drm_i915_private *dev_priv) 
	crt->base.type = INTEL_OUTPUT_ANALOG;

	crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);

	if (IS_I830(dev_priv))

		crt->base.crtc_mask = (1 << 0);

		crt->base.crtc_mask = BIT(PIPE_A);

	else

		crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);

		crt->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);



	if (IS_GEN(dev_priv, 2))

		connector->interlace_allowed = 0;

drivers/gpu/drm/i915/display/intel_dp.c

+3 −3
Original line number Diff line number Diff line
@@ -7366,11 +7366,11 @@ bool intel_dp_init(struct drm_i915_private *dev_priv, 
	intel_encoder->power_domain = intel_port_to_power_domain(port);

	if (IS_CHERRYVIEW(dev_priv)) {

		if (port == PORT_D)

			intel_encoder->crtc_mask = 1 << 2;

			intel_encoder->crtc_mask = BIT(PIPE_C);

		else

			intel_encoder->crtc_mask = (1 << 0) | (1 << 1);

			intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);

	} else {

		intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);

		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);

	}

	intel_encoder->cloneable = 0;

	intel_encoder->port = port;

drivers/gpu/drm/i915/display/intel_dvo.c

+1 −1
Original line number Diff line number Diff line
@@ -505,7 +505,7 @@ void intel_dvo_init(struct drm_i915_private *dev_priv) 
		intel_encoder->type = INTEL_OUTPUT_DVO;

		intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;

		intel_encoder->port = port;

		intel_encoder->crtc_mask = (1 << 0) | (1 << 1);

		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);



		switch (dvo->type) {

		case INTEL_DVO_CHIP_TMDS:

drivers/gpu/drm/i915/display/intel_hdmi.c

+3 −3
Original line number Diff line number Diff line
@@ -3269,11 +3269,11 @@ void intel_hdmi_init(struct drm_i915_private *dev_priv, 
	intel_encoder->port = port;

	if (IS_CHERRYVIEW(dev_priv)) {

		if (port == PORT_D)

			intel_encoder->crtc_mask = 1 << 2;

			intel_encoder->crtc_mask = BIT(PIPE_C);

		else

			intel_encoder->crtc_mask = (1 << 0) | (1 << 1);

			intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);

	} else {

		intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);

		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);

	}

	intel_encoder->cloneable = 1 << INTEL_OUTPUT_ANALOG;

	/*

drivers/gpu/drm/i915/display/intel_lvds.c

+3 −3
Original line number Diff line number Diff line
@@ -900,11 +900,11 @@ void intel_lvds_init(struct drm_i915_private *dev_priv) 
	intel_encoder->port = PORT_NONE;

	intel_encoder->cloneable = 0;

	if (HAS_PCH_SPLIT(dev_priv))

		intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);

		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);

	else if (IS_GEN(dev_priv, 4))

		intel_encoder->crtc_mask = (1 << 0) | (1 << 1);

		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);

	else

		intel_encoder->crtc_mask = (1 << 1);

		intel_encoder->crtc_mask = BIT(PIPE_B);



	drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);

	connector->display_info.subpixel_order = SubPixelHorizontalRGB;

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