Commit 0f5cbdaf authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

x86/irq: Consolidate UV domain allocation 



Move the UV specific fields into their own struct for readability sake. Get
rid of the #ifdeffery as it does not matter at all whether the alloc info
is a couple of bytes longer or not.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20200826112332.255792469@linutronix.de
parent 55e03915

arch/x86/include/asm/hw_irq.h

+12 −9
Original line number Diff line number Diff line
@@ -53,6 +53,14 @@ struct ioapic_alloc_info { 
	struct IO_APIC_route_entry	*entry;

};



struct uv_alloc_info {

	int		limit;

	int		blade;

	unsigned long	offset;

	char		*name;



};



/**

 * irq_alloc_info - X86 specific interrupt allocation info

 * @type:	X86 specific allocation type
@@ -64,6 +72,7 @@ struct ioapic_alloc_info { 
 * @data:	Allocation specific data

 *

 * @ioapic:	IOAPIC specific allocation data

 * @uv:		UV specific allocation data

*/

struct irq_alloc_info {

	enum irq_alloc_type	type;
@@ -76,20 +85,14 @@ struct irq_alloc_info { 


	union {

		struct ioapic_alloc_info	ioapic;

		struct uv_alloc_info		uv;



		int		unused;

#ifdef	CONFIG_PCI_MSI

		struct {

			struct pci_dev	*msi_dev;

			irq_hw_number_t	msi_hwirq;

		};

#endif

#ifdef	CONFIG_X86_UV

		struct {

			int		uv_limit;

			int		uv_blade;

			unsigned long	uv_offset;

			char		*uv_name;

		};

#endif

	};

};

arch/x86/platform/uv/uv_irq.c

+8 −8
Original line number Diff line number Diff line
@@ -90,15 +90,15 @@ static int uv_domain_alloc(struct irq_domain *domain, unsigned int virq, 


	ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);

	if (ret >= 0) {

		if (info->uv_limit == UV_AFFINITY_CPU)

		if (info->uv.limit == UV_AFFINITY_CPU)

			irq_set_status_flags(virq, IRQ_NO_BALANCING);

		else

			irq_set_status_flags(virq, IRQ_MOVE_PCNTXT);



		chip_data->pnode = uv_blade_to_pnode(info->uv_blade);

		chip_data->offset = info->uv_offset;

		chip_data->pnode = uv_blade_to_pnode(info->uv.blade);

		chip_data->offset = info->uv.offset;

		irq_domain_set_info(domain, virq, virq, &uv_irq_chip, chip_data,

				    handle_percpu_irq, NULL, info->uv_name);

				    handle_percpu_irq, NULL, info->uv.name);

	} else {

		kfree(chip_data);

	}
@@ -193,10 +193,10 @@ int uv_setup_irq(char *irq_name, int cpu, int mmr_blade, 


	init_irq_alloc_info(&info, cpumask_of(cpu));

	info.type = X86_IRQ_ALLOC_TYPE_UV;

	info.uv_limit = limit;

	info.uv_blade = mmr_blade;

	info.uv_offset = mmr_offset;

	info.uv_name = irq_name;

	info.uv.limit = limit;

	info.uv.blade = mmr_blade;

	info.uv.offset = mmr_offset;

	info.uv.name = irq_name;



	return irq_domain_alloc_irqs(domain, 1,

				     uv_blade_to_memory_nid(mmr_blade), &info);

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