Commit 0f2901d7 authored by Simon Horman's avatar Simon Horman
Browse files

ARM: dts: r8a7794: add soc node 



Add soc node to represent the bus and move all nodes with a base address
into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and
R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car
Gen2 SoCs to this scheme.

The ordering is derived from simply moving each node with an address up to
before any nodes without a base address that occur before the soc node.  To
improve maintainability follow-up patches will sort subnodes of both the
new soc node and the root node.

This patch should not introduce any functional change.

Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent b190cce3

arch/arm/boot/dts/r8a7794.dtsi

+1205 −1153
Original line number Diff line number Diff line
@@ -16,7 +16,6 @@ 


/ {

	compatible = "renesas,r8a7794";

	interrupt-parent = <&gic>;

	#address-cells = <2>;

	#size-cells = <2>;
@@ -67,6 +66,14 @@ 
		};

	};



	soc {

		compatible = "simple-bus";

		interrupt-parent = <&gic>;



		#address-cells = <2>;

		#size-cells = <2>;

		ranges;



		apmu@e6151000 {

			compatible = "renesas,r8a7794-apmu", "renesas,apmu";

			reg = <0 0xe6151000 0 0x188>;
@@ -90,7 +97,8 @@ 
		};



		gpio0: gpio@e6050000 {

		compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";

			compatible = "renesas,gpio-r8a7794",

				     "renesas,rcar-gen2-gpio";

			reg = <0 0xe6050000 0 0x50>;

			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;
@@ -104,7 +112,8 @@ 
		};



		gpio1: gpio@e6051000 {

		compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";

			compatible = "renesas,gpio-r8a7794",

				     "renesas,rcar-gen2-gpio";

			reg = <0 0xe6051000 0 0x50>;

			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;
@@ -118,7 +127,8 @@ 
		};



		gpio2: gpio@e6052000 {

		compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";

			compatible = "renesas,gpio-r8a7794",

				     "renesas,rcar-gen2-gpio";

			reg = <0 0xe6052000 0 0x50>;

			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;
@@ -132,7 +142,8 @@ 
		};



		gpio3: gpio@e6053000 {

		compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";

			compatible = "renesas,gpio-r8a7794",

				     "renesas,rcar-gen2-gpio";

			reg = <0 0xe6053000 0 0x50>;

			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;
@@ -146,7 +157,8 @@ 
		};



		gpio4: gpio@e6054000 {

		compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";

			compatible = "renesas,gpio-r8a7794",

				     "renesas,rcar-gen2-gpio";

			reg = <0 0xe6054000 0 0x50>;

			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;
@@ -160,7 +172,8 @@ 
		};



		gpio5: gpio@e6055000 {

		compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";

			compatible = "renesas,gpio-r8a7794",

				     "renesas,rcar-gen2-gpio";

			reg = <0 0xe6055000 0 0x50>;

			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;
@@ -174,7 +187,8 @@ 
		};



		gpio6: gpio@e6055400 {

		compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";

			compatible = "renesas,gpio-r8a7794",

				     "renesas,rcar-gen2-gpio";

			reg = <0 0xe6055400 0 0x50>;

			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;
@@ -188,7 +202,8 @@ 
		};



		cmt0: timer@ffca0000 {

		compatible = "renesas,r8a7794-cmt0", "renesas,rcar-gen2-cmt0";

			compatible = "renesas,r8a7794-cmt0",

				     "renesas,rcar-gen2-cmt0";

			reg = <0 0xffca0000 0 0x1004>;

			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
@@ -201,7 +216,8 @@ 
		};



		cmt1: timer@e6130000 {

		compatible = "renesas,r8a7794-cmt1", "renesas,rcar-gen2-cmt1";

			compatible = "renesas,r8a7794-cmt1",

				     "renesas,rcar-gen2-cmt1";

			reg = <0 0xe6130000 0 0x1004>;

			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
@@ -219,14 +235,6 @@ 
			status = "disabled";

		};



	timer {

		compatible = "arm,armv7-timer";

		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;

	};



		irqc0: interrupt-controller@e61c0000 {

			compatible = "renesas,irqc-r8a7794", "renesas,irqc";

			#interrupt-cells = <2>;
@@ -253,7 +261,8 @@ 
		};



		dmac0: dma-controller@e6700000 {

		compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";

			compatible = "renesas,dmac-r8a7794",

				     "renesas,rcar-dmac";

			reg = <0 0xe6700000 0 0x20000>;

			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
@@ -285,7 +294,8 @@ 
		};



		dmac1: dma-controller@e6720000 {

		compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";

			compatible = "renesas,dmac-r8a7794",

				     "renesas,rcar-dmac";

			reg = <0 0xe6720000 0 0x20000>;

			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
@@ -317,7 +327,8 @@ 
		};



		audma0: dma-controller@ec700000 {

		compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";

			compatible = "renesas,dmac-r8a7794",

				     "renesas,rcar-dmac";

			reg = <0 0xec700000 0 0x10000>;

			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
@@ -334,8 +345,9 @@ 
				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "error",

				  "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",

				  "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",

					  "ch0", "ch1", "ch2", "ch3", "ch4",

					  "ch5", "ch6", "ch7", "ch8", "ch9",

					  "ch10", "ch11",

					  "ch12";

			clocks = <&cpg CPG_MOD 502>;

			clock-names = "fck";
@@ -481,7 +493,8 @@ 
		};



		scif0: serial@e6e60000 {

		compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",

			compatible = "renesas,scif-r8a7794",

				     "renesas,rcar-gen2-scif",

				     "renesas,scif";

			reg = <0 0xe6e60000 0 64>;

			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
@@ -497,7 +510,8 @@ 
		};



		scif1: serial@e6e68000 {

		compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",

			compatible = "renesas,scif-r8a7794",

				     "renesas,rcar-gen2-scif",

				     "renesas,scif";

			reg = <0 0xe6e68000 0 64>;

			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
@@ -513,8 +527,8 @@ 
		};



		scif2: serial@e6e58000 {

		compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",

			     "renesas,scif";

			compatible = "renesas,scif-r8a7794",

				     "renesas,rcar-gen2-scif", "renesas,scif";

			reg = <0 0xe6e58000 0 64>;

			interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
@@ -529,8 +543,8 @@ 
		};



		scif3: serial@e6ea8000 {

		compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",

			     "renesas,scif";

			compatible = "renesas,scif-r8a7794",

				     "renesas,rcar-gen2-scif", "renesas,scif";

			reg = <0 0xe6ea8000 0 64>;

			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
@@ -545,8 +559,8 @@ 
		};



		scif4: serial@e6ee0000 {

		compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",

			     "renesas,scif";

			compatible = "renesas,scif-r8a7794",

				     "renesas,rcar-gen2-scif", "renesas,scif";

			reg = <0 0xe6ee0000 0 64>;

			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
@@ -561,8 +575,8 @@ 
		};



		scif5: serial@e6ee8000 {

		compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",

			     "renesas,scif";

			compatible = "renesas,scif-r8a7794",

				     "renesas,rcar-gen2-scif", "renesas,scif";

			reg = <0 0xe6ee8000 0 64>;

			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
@@ -581,8 +595,8 @@ 
				     "renesas,rcar-gen2-hscif", "renesas,hscif";

			reg = <0 0xe62c0000 0 96>;

			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7794_CLK_ZS>,

			 <&scif_clk>;

			clocks = <&cpg CPG_MOD 717>,

				 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;

			clock-names = "fck", "brg_int", "scif_clk";

			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,

			       <&dmac1 0x39>, <&dmac1 0x3a>;
@@ -597,8 +611,8 @@ 
				     "renesas,rcar-gen2-hscif", "renesas,hscif";

			reg = <0 0xe62c8000 0 96>;

			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7794_CLK_ZS>,

			 <&scif_clk>;

			clocks = <&cpg CPG_MOD 716>,

				 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;

			clock-names = "fck", "brg_int", "scif_clk";

			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,

			       <&dmac1 0x4d>, <&dmac1 0x4e>;
@@ -669,9 +683,12 @@ 
			status = "disabled";

		};



	/* The memory map in the User's Manual maps the cores to bus numbers */

		/* The memory map in the User's Manual maps the cores to

		 * bus numbers

		 */

		i2c0: i2c@e6508000 {

		compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";

			compatible = "renesas,i2c-r8a7794",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6508000 0 0x40>;

			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 931>;
@@ -684,7 +701,8 @@ 
		};



		i2c1: i2c@e6518000 {

		compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";

			compatible = "renesas,i2c-r8a7794",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6518000 0 0x40>;

			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 930>;
@@ -697,7 +715,8 @@ 
		};



		i2c2: i2c@e6530000 {

		compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";

			compatible = "renesas,i2c-r8a7794",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6530000 0 0x40>;

			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 929>;
@@ -710,7 +729,8 @@ 
		};



		i2c3: i2c@e6540000 {

		compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";

			compatible = "renesas,i2c-r8a7794",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6540000 0 0x40>;

			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 928>;
@@ -723,7 +743,8 @@ 
		};



		i2c4: i2c@e6520000 {

		compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";

			compatible = "renesas,i2c-r8a7794",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6520000 0 0x40>;

			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 927>;
@@ -736,7 +757,8 @@ 
		};



		i2c5: i2c@e6528000 {

		compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";

			compatible = "renesas,i2c-r8a7794",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6528000 0 0x40>;

			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 925>;
@@ -749,7 +771,8 @@ 
		};



		i2c6: i2c@e6500000 {

		compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",

			compatible = "renesas,iic-r8a7794",

				     "renesas,rcar-gen2-iic",

				     "renesas,rmobile-iic";

			reg = <0 0xe6500000 0 0x425>;

			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
@@ -765,7 +788,8 @@ 
		};



		i2c7: i2c@e6510000 {

		compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",

			compatible = "renesas,iic-r8a7794",

				     "renesas,rcar-gen2-iic",

				     "renesas,rmobile-iic";

			reg = <0 0xe6510000 0 0x425>;

			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
@@ -781,7 +805,8 @@ 
		};



		mmcif0: mmc@ee200000 {

		compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";

			compatible = "renesas,mmcif-r8a7794",

				     "renesas,sh-mmcif";

			reg = <0 0xee200000 0 0x80>;

			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 315>;
@@ -856,7 +881,8 @@ 
		};



		vin0: video@e6ef0000 {

		compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";

			compatible = "renesas,vin-r8a7794",

				     "renesas,rcar-gen2-vin";

			reg = <0 0xe6ef0000 0 0x1000>;

			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 811>;
@@ -866,7 +892,8 @@ 
		};



		vin1: video@e6ef1000 {

		compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";

			compatible = "renesas,vin-r8a7794",

				     "renesas,rcar-gen2-vin";

			reg = <0 0xe6ef1000 0 0x1000>;

			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 810>;
@@ -876,7 +903,8 @@ 
		};



		pci0: pci@ee090000 {

		compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";

			compatible = "renesas,pci-r8a7794",

				     "renesas,pci-rcar-gen2";

			device_type = "pci";

			reg = <0 0xee090000 0 0xc00>,

			      <0 0xee080000 0 0x1100>;
@@ -910,7 +938,8 @@ 
		};



		pci1: pci@ee0d0000 {

		compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";

			compatible = "renesas,pci-r8a7794",

				     "renesas,pci-rcar-gen2";

			device_type = "pci";

			reg = <0 0xee0d0000 0 0xc00>,

			      <0 0xee0c0000 0 0x1100>;
@@ -944,7 +973,8 @@ 
		};



		hsusb: usb@e6590000 {

		compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs";

			compatible = "renesas,usbhs-r8a7794",

				     "renesas,rcar-gen2-usbhs";

			reg = <0 0xe6590000 0 0x100>;

			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 704>;
@@ -1024,7 +1054,8 @@ 
		};



		can0: can@e6e80000 {

		compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";

			compatible = "renesas,can-r8a7794",

				     "renesas,rcar-gen2-can";

			reg = <0 0xe6e80000 0 0x1000>;

			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
@@ -1036,7 +1067,8 @@ 
		};



		can1: can@e6e88000 {

		compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";

			compatible = "renesas,can-r8a7794",

				     "renesas,rcar-gen2-can";

			reg = <0 0xe6e88000 0 0x1000>;

			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
@@ -1047,58 +1079,6 @@ 
			status = "disabled";

		};



	/* External root clock */

	extal_clk: extal {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		/* This value must be overridden by the board. */

		clock-frequency = <0>;

	};



	/* External USB clock - can be overridden by the board */

	usb_extal_clk: usb_extal {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <48000000>;

	};



	/* External CAN clock */

	can_clk: can {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		/* This value must be overridden by the board. */

		clock-frequency = <0>;

	};



	/* External SCIF clock */

	scif_clk: scif {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		/* This value must be overridden by the board. */

		clock-frequency = <0>;

	};



	/*

	 * The external audio clocks are configured  as 0 Hz fixed

	 * frequency clocks by default.  Boards that provide audio

	 * clocks should override them.

	 */

	audio_clka: audio_clka {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};

	audio_clkb: audio_clkb {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};

	audio_clkc: audio_clkc {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};



		cpg: clock-controller@e6150000 {

			compatible = "renesas,r8a7794-cpg-mssr";

			reg = <0 0xe6150000 0 0x1000>;
@@ -1126,7 +1106,8 @@ 
		};



		ipmmu_sy0: mmu@e6280000 {

		compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";

			compatible = "renesas,ipmmu-r8a7794",

				     "renesas,ipmmu-vmsa";

			reg = <0 0xe6280000 0 0x1000>;

			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
@@ -1135,7 +1116,8 @@ 
		};



		ipmmu_sy1: mmu@e6290000 {

		compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";

			compatible = "renesas,ipmmu-r8a7794",

				     "renesas,ipmmu-vmsa";

			reg = <0 0xe6290000 0 0x1000>;

			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;

			#iommu-cells = <1>;
@@ -1143,7 +1125,8 @@ 
		};



		ipmmu_ds: mmu@e6740000 {

		compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";

			compatible = "renesas,ipmmu-r8a7794",

				     "renesas,ipmmu-vmsa";

			reg = <0 0xe6740000 0 0x1000>;

			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
@@ -1152,7 +1135,8 @@ 
		};



		ipmmu_mp: mmu@ec680000 {

		compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";

			compatible = "renesas,ipmmu-r8a7794",

				     "renesas,ipmmu-vmsa";

			reg = <0 0xec680000 0 0x1000>;

			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;

			#iommu-cells = <1>;
@@ -1160,7 +1144,8 @@ 
		};



		ipmmu_mx: mmu@fe951000 {

		compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";

			compatible = "renesas,ipmmu-r8a7794",

				     "renesas,ipmmu-vmsa";

			reg = <0 0xfe951000 0 0x1000>;

			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
@@ -1169,7 +1154,8 @@ 
		};



		ipmmu_gp: mmu@e62a0000 {

		compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";

			compatible = "renesas,ipmmu-r8a7794",

				     "renesas,ipmmu-vmsa";

			reg = <0 0xe62a0000 0 0x1000>;

			interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
@@ -1208,22 +1194,26 @@ 
				 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,

				 <&cpg CPG_CORE R8A7794_CLK_M2>;

			clock-names = "ssi-all",

			      "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",

			      "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",

			      "src.6", "src.5", "src.4", "src.3", "src.2",

			      "src.1",

				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",

				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",

				      "ssi.1", "ssi.0",

				      "src.6", "src.5", "src.4", "src.3",

				      "src.2", "src.1",

				      "ctu.0", "ctu.1",

				      "mix.0", "mix.1",

				      "dvc.0", "dvc.1",

				      "clk_a", "clk_b", "clk_c", "clk_i";

			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;

			resets = <&cpg 1005>,

			 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,

			 <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,

				 <&cpg 1006>, <&cpg 1007>,

				 <&cpg 1008>, <&cpg 1009>,

				 <&cpg 1010>, <&cpg 1011>,

				 <&cpg 1012>, <&cpg 1013>,

				 <&cpg 1014>, <&cpg 1015>;

			reset-names = "ssi-all",

			      "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",

			      "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";

				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",

				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",

				      "ssi.1", "ssi.0";



			status = "disabled";
@@ -1354,3 +1344,65 @@ 
			};

		};

	};



	timer {

		compatible = "arm,armv7-timer";

		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,

				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,

				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,

				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;

	};





	/* External root clock */

	extal_clk: extal {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		/* This value must be overridden by the board. */

		clock-frequency = <0>;

	};



	/* External USB clock - can be overridden by the board */

	usb_extal_clk: usb_extal {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <48000000>;

	};



	/* External CAN clock */

	can_clk: can {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		/* This value must be overridden by the board. */

		clock-frequency = <0>;

	};



	/* External SCIF clock */

	scif_clk: scif {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		/* This value must be overridden by the board. */

		clock-frequency = <0>;

	};



	/*

	 * The external audio clocks are configured  as 0 Hz fixed

	 * frequency clocks by default.  Boards that provide audio

	 * clocks should override them.

	 */

	audio_clka: audio_clka {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};

	audio_clkb: audio_clkb {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};

	audio_clkc: audio_clkc {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};

};

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