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We can have the interconnect target module control registers pretty much anywhere within the module range. The current code attempts an incomplete optimization of the ioremap size but does it wrong and it only works for registers at the beginning of the module. Let's just use the largest control register to calculate the ioremap size. The ioremapped range is for most part cached anyways so there is no need for size optimization. Let's also update the comments accordingly. Fixes: 0eecc636 ("bus: ti-sysc: Add minimal TI sysc interconnect target driver") Signed-off-by:Tony Lindgren <tony@atomide.com>
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