extcon: max77693: Initialize register of MUIC device to bring up it without platform data (0ec83bd2) · Commits · 戴 / test

drivers/extcon/extcon-max77693.c

+68 −25

Original line number	Diff line number	Diff line
		@@ -32,6 +32,38 @@
		#define DEV_NAME "max77693-muic"
		#define DELAY_MS_DEFAULT 20000 /* unit: millisecond */

		/*
		* Default value of MAX77693 register to bring up MUIC device.
		* If user don't set some initial value for MUIC device through platform data,
		* extcon-max77693 driver use 'default_init_data' to bring up base operation
		* of MAX77693 MUIC device.
		*/
		struct max77693_reg_data default_init_data[] = {
		{
		/* STATUS2 - [3]ChgDetRun */
		.addr = MAX77693_MUIC_REG_STATUS2,
		.data = STATUS2_CHGDETRUN_MASK,
		}, {
		/* INTMASK1 - Unmask [3]ADC1KM,[0]ADCM */
		.addr = MAX77693_MUIC_REG_INTMASK1,
		.data = INTMASK1_ADC1K_MASK
		\| INTMASK1_ADC_MASK,
		}, {
		/* INTMASK2 - Unmask [0]ChgTypM */
		.addr = MAX77693_MUIC_REG_INTMASK2,
		.data = INTMASK2_CHGTYP_MASK,
		}, {
		/* INTMASK3 - Mask all of interrupts */
		.addr = MAX77693_MUIC_REG_INTMASK3,
		.data = 0x0,
		}, {
		/* CDETCTRL2 */
		.addr = MAX77693_MUIC_REG_CDETCTRL2,
		.data = CDETCTRL2_VIDRMEN_MASK
		\| CDETCTRL2_DXOVPEN_MASK,
		},
		};

		enum max77693_muic_adc_debounce_time {
		ADC_DEBOUNCE_TIME_5MS = 0,
		ADC_DEBOUNCE_TIME_10MS,
		@@ -1046,6 +1078,8 @@ static int max77693_muic_probe(struct platform_device *pdev)
		struct max77693_dev *max77693 = dev_get_drvdata(pdev->dev.parent);
		struct max77693_platform_data *pdata = dev_get_platdata(max77693->dev);
		struct max77693_muic_info *info;
		struct max77693_reg_data *init_data;
		int num_init_data;
		int delay_jiffies;
		int ret;
		int i;
		@@ -1144,19 +1178,25 @@ static int max77693_muic_probe(struct platform_device *pdev)
		goto err_irq;
		}


		/* Initialize MUIC register by using platform data or default data */
		if (pdata->muic_data) {
		struct max77693_muic_platform_data *muic_pdata = pdata->muic_data;
		init_data = pdata->muic_data->init_data;
		num_init_data = pdata->muic_data->num_init_data;
		} else {
		init_data = default_init_data;
		num_init_data = ARRAY_SIZE(default_init_data);
		}

		/* Initialize MUIC register by using platform data */
		for (i = 0 ; i < muic_pdata->num_init_data ; i++) {
		for (i = 0 ; i < num_init_data ; i++) {
		enum max77693_irq_source irq_src
		= MAX77693_IRQ_GROUP_NR;

		max77693_write_reg(info->max77693->regmap_muic,
		muic_pdata->init_data[i].addr,
		muic_pdata->init_data[i].data);
		init_data[i].addr,
		init_data[i].data);

		switch (muic_pdata->init_data[i].addr) {
		switch (init_data[i].addr) {
		case MAX77693_MUIC_REG_INTMASK1:
		irq_src = MUIC_INT1;
		break;
		@@ -1170,9 +1210,12 @@ static int max77693_muic_probe(struct platform_device *pdev)

		if (irq_src < MAX77693_IRQ_GROUP_NR)
		info->max77693->irq_masks_cur[irq_src]
		= muic_pdata->init_data[i].data;
		= init_data[i].data;
		}

		if (pdata->muic_data) {
		struct max77693_muic_platform_data *muic_pdata = pdata->muic_data;

		/*
		* Default usb/uart path whether UART/USB or AUX_UART/AUX_USB
		* h/w path of COMP2/COMN1 on CONTROL1 register.

include/linux/mfd/max77693-private.h

+23 −0

Original line number	Diff line number	Diff line
		@@ -106,6 +106,29 @@ enum max77693_muic_reg {
		MAX77693_MUIC_REG_END,
		};

		/* MAX77693 INTMASK1~2 Register */
		#define INTMASK1_ADC1K_SHIFT 3
		#define INTMASK1_ADCERR_SHIFT 2
		#define INTMASK1_ADCLOW_SHIFT 1
		#define INTMASK1_ADC_SHIFT 0
		#define INTMASK1_ADC1K_MASK (1 << INTMASK1_ADC1K_SHIFT)
		#define INTMASK1_ADCERR_MASK (1 << INTMASK1_ADCERR_SHIFT)
		#define INTMASK1_ADCLOW_MASK (1 << INTMASK1_ADCLOW_SHIFT)
		#define INTMASK1_ADC_MASK (1 << INTMASK1_ADC_SHIFT)

		#define INTMASK2_VIDRM_SHIFT 5
		#define INTMASK2_VBVOLT_SHIFT 4
		#define INTMASK2_DXOVP_SHIFT 3
		#define INTMASK2_DCDTMR_SHIFT 2
		#define INTMASK2_CHGDETRUN_SHIFT 1
		#define INTMASK2_CHGTYP_SHIFT 0
		#define INTMASK2_VIDRM_MASK (1 << INTMASK2_VIDRM_SHIFT)
		#define INTMASK2_VBVOLT_MASK (1 << INTMASK2_VBVOLT_SHIFT)
		#define INTMASK2_DXOVP_MASK (1 << INTMASK2_DXOVP_SHIFT)
		#define INTMASK2_DCDTMR_MASK (1 << INTMASK2_DCDTMR_SHIFT)
		#define INTMASK2_CHGDETRUN_MASK (1 << INTMASK2_CHGDETRUN_SHIFT)
		#define INTMASK2_CHGTYP_MASK (1 << INTMASK2_CHGTYP_SHIFT)

		/* MAX77693 MUIC - STATUS1~3 Register */
		#define STATUS1_ADC_SHIFT (0)
		#define STATUS1_ADCLOW_SHIFT (5)

Admin message