Commit 0e7b01aa authored by Alexander Shiyan's avatar Alexander Shiyan Committed by Shawn Guo
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ARM: dts: i.MX27: Add SDHC devicetree nodes



This patch adds the missing SDHC devicetree nodes for i.MX27 SoCs.

Signed-off-by: default avatarAlexander Shiyan <shc_work@mail.ru>
Acked-by: default avatarSascha Hauer <s.hauer@pengutonix.de>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent b858c34f
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+33 −0
Original line number Diff line number Diff line
@@ -178,6 +178,28 @@
				status = "disabled";
			};

			sdhci1: sdhci@10013000 {
				compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
				reg = <0x10013000 0x1000>;
				interrupts = <11>;
				clocks = <&clks 30>, <&clks 60>;
				clock-names = "ipg", "per";
				dmas = <&dma 7>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			sdhci2: sdhci@10014000 {
				compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
				reg = <0x10014000 0x1000>;
				interrupts = <10>;
				clocks = <&clks 29>, <&clks 60>;
				clock-names = "ipg", "per";
				dmas = <&dma 6>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			gpio1: gpio@10015000 {
				compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
				reg = <0x10015000 0x100>;
@@ -293,6 +315,17 @@
				status = "disabled";
			};

			sdhci3: sdhci@1001e000 {
				compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
				reg = <0x1001e000 0x1000>;
				interrupts = <9>;
				clocks = <&clks 28>, <&clks 60>;
				clock-names = "ipg", "per";
				dmas = <&dma 36>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			gpt6: timer@1001f000 {
				compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
				reg = <0x1001f000 0x1000>;