Commit 0e68de6a authored by Ludovic Barre's avatar Ludovic Barre Committed by Ulf Hansson
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mmc: mmci: sdmmc: add busy_complete callback 



This patch adds a specific busy_complete callback for sdmmc variant.

sdmmc has 2 status flags:
-busyd0: This is a hardware status flag (inverted value of d0 line).
it does not generate an interrupt.
-busyd0end: This indicates only end of busy following a CMD response.
On busy to Not busy changes, an interrupt is generated (if unmask)
and BUSYD0END status flag is set. Status flag is cleared by writing
corresponding interrupt clear bit in MMCICLEAR.

The legacy busy completion has no dedicated interrupt for the end
of busy, so it's must monitor step by step the busy progression.
On sdmmc variant, this procedure is not needed, it's just need
to wait the busyd0end interrupt.

Signed-off-by: default avatarLudovic Barre <ludovic.barre@st.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent cb0335b7

drivers/mmc/host/mmci.c

+4 −0
Original line number Diff line number Diff line
@@ -262,6 +262,10 @@ static struct variant_data variant_stm32_sdmmc = { 
	.datalength_bits	= 25,

	.datactrl_blocksz	= 14,

	.stm32_idmabsize_mask	= GENMASK(12, 5),

	.busy_timeout		= true,

	.busy_detect		= true,

	.busy_detect_flag	= MCI_STM32_BUSYD0,

	.busy_detect_mask	= MCI_STM32_BUSYD0ENDMASK,

	.init			= sdmmc_variant_init,

};

drivers/mmc/host/mmci.h

+1 −0
Original line number Diff line number Diff line
@@ -164,6 +164,7 @@ 
#define MCI_ST_CARDBUSY		(1 << 24)

/* Extended status bits for the STM32 variants */

#define MCI_STM32_BUSYD0	BIT(20)

#define MCI_STM32_BUSYD0END	BIT(21)



#define MMCICLEAR		0x038

#define MCI_CMDCRCFAILCLR	(1 << 0)

drivers/mmc/host/mmci_stm32_sdmmc.c

+42 −0
Original line number Diff line number Diff line
@@ -282,6 +282,47 @@ static u32 sdmmc_get_dctrl_cfg(struct mmci_host *host) 
	return datactrl;

}



static bool sdmmc_busy_complete(struct mmci_host *host, u32 status, u32 err_msk)

{

	void __iomem *base = host->base;

	u32 busy_d0, busy_d0end, mask, sdmmc_status;



	mask = readl_relaxed(base + MMCIMASK0);

	sdmmc_status = readl_relaxed(base + MMCISTATUS);

	busy_d0end = sdmmc_status & MCI_STM32_BUSYD0END;

	busy_d0 = sdmmc_status & MCI_STM32_BUSYD0;



	/* complete if there is an error or busy_d0end */

	if ((status & err_msk) || busy_d0end)

		goto complete;



	/*

	 * On response the busy signaling is reflected in the BUSYD0 flag.

	 * if busy_d0 is in-progress we must activate busyd0end interrupt

	 * to wait this completion. Else this request has no busy step.

	 */

	if (busy_d0) {

		if (!host->busy_status) {

			writel_relaxed(mask | host->variant->busy_detect_mask,

				       base + MMCIMASK0);

			host->busy_status = status &

				(MCI_CMDSENT | MCI_CMDRESPEND);

		}

		return false;

	}



complete:

	if (host->busy_status) {

		writel_relaxed(mask & ~host->variant->busy_detect_mask,

			       base + MMCIMASK0);

		writel_relaxed(host->variant->busy_detect_mask,

			       base + MMCICLEAR);

		host->busy_status = 0;

	}



	return true;

}



static struct mmci_host_ops sdmmc_variant_ops = {

	.validate_data = sdmmc_idma_validate_data,

	.prep_data = sdmmc_idma_prep_data,
@@ -292,6 +333,7 @@ static struct mmci_host_ops sdmmc_variant_ops = { 
	.dma_finalize = sdmmc_idma_finalize,

	.set_clkreg = mmci_sdmmc_set_clkreg,

	.set_pwrreg = mmci_sdmmc_set_pwrreg,

	.busy_complete = sdmmc_busy_complete,

};



void sdmmc_variant_init(struct mmci_host *host)

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