Commit 0e5fdca7 authored by Lennert Buytenhek's avatar Lennert Buytenhek Committed by Russell King
Browse files

[ARM] 3971/1: xsc3: get rid of L_PTE_COHERENT 



Merge L_PTE_COHERENT with L_PTE_SHARED and free up a L_PTE_* bit.

Signed-off-by: default avatarLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent e520a36d

arch/arm/mm/mmu.c

+1 −1
Original line number Diff line number Diff line
@@ -265,7 +265,7 @@ static void __init build_mem_type_table(void) 
	if (arch_is_coherent()) {

		if (cpu_is_xsc3()) {

			mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;

			mem_types[MT_MEMORY].prot_pte |= L_PTE_COHERENT;

			mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;

		}

	}

arch/arm/mm/proc-xsc3.S

+3 −1
Original line number Diff line number Diff line
@@ -371,8 +371,10 @@ ENTRY(cpu_xsc3_switch_mm) 
ENTRY(cpu_xsc3_set_pte)

	str	r1, [r0], #-2048		@ linux version



	bic	r2, r1, #0xdf0			@ Keep C, B, coherency bits

	bic	r2, r1, #0xff0			@ Keep C, B bits

	orr	r2, r2, #PTE_TYPE_EXT		@ extended page

	tst	r1, #L_PTE_SHARED		@ Shared?

	orrne	r2, r2, #0x200



	eor	r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY

include/asm-arm/pgtable.h

+1 −2
Original line number Diff line number Diff line
@@ -169,8 +169,7 @@ extern void __pgd_error(const char *file, int line, unsigned long val); 
#define L_PTE_WRITE		(1 << 5)

#define L_PTE_EXEC		(1 << 6)

#define L_PTE_DIRTY		(1 << 7)

#define L_PTE_COHERENT		(1 << 9)	/* I/O coherent (xsc3) */

#define L_PTE_SHARED		(1 << 10)	/* shared between CPUs (v6) */

#define L_PTE_SHARED		(1 << 10)	/* shared(v6), coherent(xsc3) */

#define L_PTE_ASID		(1 << 11)	/* non-global (use ASID, v6) */



#ifndef __ASSEMBLY__

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