Commit 0e4c2eeb authored by Lorenzo Pieralisi's avatar Lorenzo Pieralisi Committed by Bjorn Helgaas
Browse files

alpha/PCI: Replace pci_fixup_irqs() call with host bridge IRQ mapping hooks 



The pci_fixup_irqs() function allocates IRQs for all PCI devices present in
a system; those PCI devices possibly belong to different PCI bus trees (and
possibly rooted at different host bridges) and may well be enabled (ie
probed and bound to a driver) by the time pci_fixup_irqs() is called when
probing a given host bridge driver.

Furthermore, current kernel code relying on pci_fixup_irqs() to assign
legacy PCI IRQs to devices does not work at all for hotplugged devices in
that the code carrying out the IRQ fixup is called at host bridge driver
probe time, which just cannot take into account devices hotplugged after
the system has booted.

The introduction of map/swizzle function hooks in struct pci_host_bridge
allows us to define per-bridge map/swizzle functions that can be used at
device probe time in PCI core code to allocate IRQs for a given device
(through pci_assign_irq()).

Convert PCI host bridge initialization code to the
pci_scan_root_bus_bridge() API (that allows to pass a struct
pci_host_bridge with initialized map/swizzle pointers) and remove the
pci_fixup_irqs() call from arch code.

Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
parent 20d69322

arch/alpha/kernel/pci.c

+20 −7
Original line number Original line Diff line number Diff line
@@ -312,8 +312,9 @@ common_init_pci(void) 
{

{

	struct pci_controller *hose;

	struct pci_controller *hose;

	struct list_head resources;

	struct list_head resources;

	struct pci_host_bridge *bridge;

	struct pci_bus *bus;

	struct pci_bus *bus;

	int next_busno;

	int ret, next_busno;

	int need_domain_info = 0;

	int need_domain_info = 0;

	u32 pci_mem_end;

	u32 pci_mem_end;

	u32 sg_base;

	u32 sg_base;
@@ -336,11 +337,25 @@ common_init_pci(void) 
		pci_add_resource_offset(&resources, hose->mem_space,

		pci_add_resource_offset(&resources, hose->mem_space,

					hose->mem_space->start);

					hose->mem_space->start);





		bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops,

		bridge = pci_alloc_host_bridge(0);

					hose, &resources);

		if (!bridge)

		if (!bus)

			continue;

			continue;

		hose->bus = bus;



		list_splice_init(&resources, &bridge->windows);

		bridge->dev.parent = NULL;

		bridge->sysdata = hose;

		bridge->busnr = next_busno;

		bridge->ops = alpha_mv.pci_ops;

		bridge->swizzle_irq = alpha_mv.pci_swizzle;

		bridge->map_irq = alpha_mv.pci_map_irq;



		ret = pci_scan_root_bus_bridge(bridge);

		if (ret) {

			pci_free_host_bridge(bridge);

			continue;

		}



		bus = hose->bus = bridge->bus;

		hose->need_domain_info = need_domain_info;

		hose->need_domain_info = need_domain_info;

		next_busno = bus->busn_res.end + 1;

		next_busno = bus->busn_res.end + 1;

		/* Don't allow 8-bit bus number overflow inside the hose -

		/* Don't allow 8-bit bus number overflow inside the hose -
@@ -354,7 +369,6 @@ common_init_pci(void) 
	pcibios_claim_console_setup();

	pcibios_claim_console_setup();





	pci_assign_unassigned_resources();

	pci_assign_unassigned_resources();

	pci_fixup_irqs(alpha_mv.pci_swizzle, alpha_mv.pci_map_irq);

	for (hose = hose_head; hose; hose = hose->next) {

	for (hose = hose_head; hose; hose = hose->next) {

		bus = hose->bus;

		bus = hose->bus;

		if (bus)

		if (bus)
@@ -362,7 +376,6 @@ common_init_pci(void) 
	}

	}

}

}







struct pci_controller * __init

struct pci_controller * __init

alloc_pci_controller(void)

alloc_pci_controller(void)

{

{

arch/alpha/kernel/sys_nautilus.c

+27 −4
Original line number Original line Diff line number Diff line
@@ -194,22 +194,46 @@ static struct resource irongate_mem = { 
	.name	= "Irongate PCI MEM",

	.name	= "Irongate PCI MEM",

	.flags	= IORESOURCE_MEM,

	.flags	= IORESOURCE_MEM,

};

};

static struct resource busn_resource = {

	.name	= "PCI busn",

	.start	= 0,

	.end	= 255,

	.flags	= IORESOURCE_BUS,

};





void __init

void __init

nautilus_init_pci(void)

nautilus_init_pci(void)

{

{

	struct pci_controller *hose = hose_head;

	struct pci_controller *hose = hose_head;

	struct pci_host_bridge *bridge;

	struct pci_bus *bus;

	struct pci_bus *bus;

	struct pci_dev *irongate;

	struct pci_dev *irongate;

	unsigned long bus_align, bus_size, pci_mem;

	unsigned long bus_align, bus_size, pci_mem;

	unsigned long memtop = max_low_pfn << PAGE_SHIFT;

	unsigned long memtop = max_low_pfn << PAGE_SHIFT;

	int ret;



	bridge = pci_alloc_host_bridge(0);

	if (!bridge)

		return;



	pci_add_resource(&bridge->windows, &ioport_resource);

	pci_add_resource(&bridge->windows, &iomem_resource);

	pci_add_resource(&bridge->windows, &busn_resource);

	bridge->dev.parent = NULL;

	bridge->sysdata = hose;

	bridge->busnr = 0;

	bridge->ops = alpha_mv.pci_ops;

	bridge->swizzle_irq = alpha_mv.pci_swizzle;

	bridge->map_irq = alpha_mv.pci_map_irq;





	/* Scan our single hose.  */

	/* Scan our single hose.  */

	bus = pci_scan_bus(0, alpha_mv.pci_ops, hose);

	ret = pci_scan_root_bus_bridge(bridge);

	if (!bus)

	if (ret) {

		pci_free_host_bridge(bridge);

		return;

		return;

	}





	hose->bus = bus;

	bus = hose->bus = bridge->bus;

	pcibios_claim_one_bus(bus);

	pcibios_claim_one_bus(bus);





	irongate = pci_get_bus_and_slot(0, 0);

	irongate = pci_get_bus_and_slot(0, 0);
@@ -254,7 +278,6 @@ nautilus_init_pci(void) 
	/* pci_common_swizzle() relies on bus->self being NULL

	/* pci_common_swizzle() relies on bus->self being NULL

	   for the root bus, so just clear it. */

	   for the root bus, so just clear it. */

	bus->self = NULL;

	bus->self = NULL;

	pci_fixup_irqs(alpha_mv.pci_swizzle, alpha_mv.pci_map_irq);

	pci_bus_add_devices(bus);

	pci_bus_add_devices(bus);

}

}

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