Commit 0e03aca2 authored Sep 29, 2018 by Radhey Shyam Pandey Committed by Vinod Koul Nov 11, 2018

dmaengine: xilinx_dma: Fix 64-bit simple CDMA transfer



In AXI CDMA simple mode also pass MSB bits of source and destination
address to xilinx_write function. This fixes simple CDMA operation
mode using 64-bit addressing.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>

parent 4e47d24a

drivers/dma/xilinx/xilinx_dma.c

+4 −2

Original line number	Diff line number	Diff line
		@@ -1247,8 +1247,10 @@ static void xilinx_cdma_start_transfer(struct xilinx_dma_chan *chan)

		hw = &segment->hw;

		xilinx_write(chan, XILINX_CDMA_REG_SRCADDR, hw->src_addr);
		xilinx_write(chan, XILINX_CDMA_REG_DSTADDR, hw->dest_addr);
		xilinx_write(chan, XILINX_CDMA_REG_SRCADDR,
		xilinx_prep_dma_addr_t(hw->src_addr));
		xilinx_write(chan, XILINX_CDMA_REG_DSTADDR,
		xilinx_prep_dma_addr_t(hw->dest_addr));

		/* Start the transfer */
		dma_ctrl_write(chan, XILINX_DMA_REG_BTT,

Admin message