MIPS: Add Cavium OCTEON processor constants and CPU probe. (0dd4781b) · Commits · 戴 / test

arch/mips/include/asm/cpu.h

+14 −0

Original line number	Diff line number	Diff line
		@@ -33,6 +33,7 @@
		#define PRID_COMP_TOSHIBA 0x070000
		#define PRID_COMP_LSI 0x080000
		#define PRID_COMP_LEXRA 0x0b0000
		#define PRID_COMP_CAVIUM 0x0d0000


		/*
		@@ -113,6 +114,18 @@
		#define PRID_IMP_BCM4710 0x4000
		#define PRID_IMP_BCM3302 0x9000

		/*
		* These are the PRID's for when 23:16 == PRID_COMP_CAVIUM
		*/

		#define PRID_IMP_CAVIUM_CN38XX 0x0000
		#define PRID_IMP_CAVIUM_CN31XX 0x0100
		#define PRID_IMP_CAVIUM_CN30XX 0x0200
		#define PRID_IMP_CAVIUM_CN58XX 0x0300
		#define PRID_IMP_CAVIUM_CN56XX 0x0400
		#define PRID_IMP_CAVIUM_CN50XX 0x0600
		#define PRID_IMP_CAVIUM_CN52XX 0x0700

		/*
		* Definitions for 7:0 on legacy processors
		*/
		@@ -203,6 +216,7 @@ enum cpu_type_enum {
		* MIPS64 class processors
		*/
		CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
		CPU_CAVIUM_OCTEON,

		CPU_LAST
		};

+2 −0

Original line number	Diff line number	Diff line
		@@ -116,6 +116,8 @@ search_module_dbetables(unsigned long addr)
		#define MODULE_PROC_FAMILY "SB1 "
		#elif defined CONFIG_CPU_LOONGSON2
		#define MODULE_PROC_FAMILY "LOONGSON2 "
		#elif defined CONFIG_CPU_CAVIUM_OCTEON
		#define MODULE_PROC_FAMILY "OCTEON "
		#else
		#error MODULE_PROC_FAMILY undefined for your processor configuration
		#endif

+25 −0

Original line number	Diff line number	Diff line
		@@ -154,6 +154,7 @@ void __init check_wait(void)
		case CPU_25KF:
		case CPU_PR4450:
		case CPU_BCM3302:
		case CPU_CAVIUM_OCTEON:
		cpu_wait = r4k_wait;
		break;

		@@ -875,6 +876,27 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
		}
		}

		static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu)
		{
		decode_configs(c);
		switch (c->processor_id & 0xff00) {
		case PRID_IMP_CAVIUM_CN38XX:
		case PRID_IMP_CAVIUM_CN31XX:
		case PRID_IMP_CAVIUM_CN30XX:
		case PRID_IMP_CAVIUM_CN58XX:
		case PRID_IMP_CAVIUM_CN56XX:
		case PRID_IMP_CAVIUM_CN50XX:
		case PRID_IMP_CAVIUM_CN52XX:
		c->cputype = CPU_CAVIUM_OCTEON;
		__cpu_name[cpu] = "Cavium Octeon";
		break;
		default:
		printk(KERN_INFO "Unknown Octeon chip!\n");
		c->cputype = CPU_UNKNOWN;
		break;
		}
		}

		const char *__cpu_name[NR_CPUS];

		__cpuinit void cpu_probe(void)
		@@ -909,6 +931,9 @@ __cpuinit void cpu_probe(void)
		case PRID_COMP_NXP:
		cpu_probe_nxp(c, cpu);
		break;
		case PRID_COMP_CAVIUM:
		cpu_probe_cavium(c, cpu);
		break;
		}

		BUG_ON(!__cpu_name[cpu]);