Commit 0dd376e7 authored by Liu, Jinsong's avatar Liu, Jinsong Committed by Paolo Bonzini
Browse files

KVM: x86: add MSR_IA32_BNDCFGS to msrs_to_save 



From 5d5a80cd172ea6fb51786369bcc23356b1e9e956 Mon Sep 17 00:00:00 2001
From: Liu Jinsong <jinsong.liu@intel.com>
Date: Mon, 24 Feb 2014 18:11:55 +0800
Subject: [PATCH v5 2/3] KVM: x86: add MSR_IA32_BNDCFGS to msrs_to_save

Add MSR_IA32_BNDCFGS to msrs_to_save, and corresponding logic
to kvm_get/set_msr().

Signed-off-by: default avatarLiu Jinsong <jinsong.liu@intel.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent da8999d3

arch/x86/kvm/vmx.c

+6 −0
Original line number Original line Diff line number Diff line
@@ -2484,6 +2484,9 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata) 
	case MSR_IA32_SYSENTER_ESP:

	case MSR_IA32_SYSENTER_ESP:

		data = vmcs_readl(GUEST_SYSENTER_ESP);

		data = vmcs_readl(GUEST_SYSENTER_ESP);

		break;

		break;

	case MSR_IA32_BNDCFGS:

		data = vmcs_read64(GUEST_BNDCFGS);

		break;

	case MSR_IA32_FEATURE_CONTROL:

	case MSR_IA32_FEATURE_CONTROL:

		if (!nested_vmx_allowed(vcpu))

		if (!nested_vmx_allowed(vcpu))

			return 1;

			return 1;
@@ -2552,6 +2555,9 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) 
	case MSR_IA32_SYSENTER_ESP:

	case MSR_IA32_SYSENTER_ESP:

		vmcs_writel(GUEST_SYSENTER_ESP, data);

		vmcs_writel(GUEST_SYSENTER_ESP, data);

		break;

		break;

	case MSR_IA32_BNDCFGS:

		vmcs_write64(GUEST_BNDCFGS, data);

		break;

	case MSR_IA32_TSC:

	case MSR_IA32_TSC:

		kvm_write_tsc(vcpu, msr_info);

		kvm_write_tsc(vcpu, msr_info);

		break;

		break;

arch/x86/kvm/x86.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -882,7 +882,7 @@ static u32 msrs_to_save[] = { 
	MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,

	MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,

#endif

#endif

	MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,

	MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,

	MSR_IA32_FEATURE_CONTROL

	MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS

};

};





static unsigned num_msrs_to_save;

static unsigned num_msrs_to_save;

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