Commit 0dc016db authored by Wang Nan's avatar Wang Nan Committed by Jon Medhurst
Browse files

ARM: kprobes: enable OPTPROBES for ARM 32 



This patch introduce kprobeopt for ARM 32.

Limitations:
 - Currently only kernel compiled with ARM ISA is supported.

 - Offset between probe point and optinsn slot must not larger than
   32MiB. Masami Hiramatsu suggests replacing 2 words, it will make
   things complex. Futher patch can make such optimization.

Kprobe opt on ARM is relatively simpler than kprobe opt on x86 because
ARM instruction is always 4 bytes aligned and 4 bytes long. This patch
replace probed instruction by a 'b', branch to trampoline code and then
calls optimized_callback(). optimized_callback() calls opt_pre_handler()
to execute kprobe handler. It also emulate/simulate replaced instruction.

When unregistering kprobe, the deferred manner of unoptimizer may leave
branch instruction before optimizer is called. Different from x86_64,
which only copy the probed insn after optprobe_template_end and
reexecute them, this patch call singlestep to emulate/simulate the insn
directly. Futher patch can optimize this behavior.

Signed-off-by: default avatarWang Nan <wangnan0@huawei.com>
Acked-by: default avatarMasami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Will Deacon <will.deacon@arm.com>
Reviewed-by: default avatarJon Medhurst (Tixy) <tixy@linaro.org>
Signed-off-by: default avatarJon Medhurst <tixy@linaro.org>
parent cbf6ab52

arch/arm/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -60,6 +60,7 @@ config ARM 
	select HAVE_MEMBLOCK

	select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND

	select HAVE_OPROFILE if (HAVE_PERF_EVENTS)

	select HAVE_OPTPROBES if !THUMB2_KERNEL

	select HAVE_PERF_EVENTS

	select HAVE_PERF_REGS

	select HAVE_PERF_USER_STACK_DUMP

arch/arm/kernel/insn.h→arch/arm/include/asm/insn.h

+0 −0

File moved.

View file

arch/arm/include/asm/kprobes.h

+29 −0
Original line number Diff line number Diff line
@@ -50,5 +50,34 @@ int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr); 
int kprobe_exceptions_notify(struct notifier_block *self,

			     unsigned long val, void *data);



/* optinsn template addresses */

extern __visible kprobe_opcode_t optprobe_template_entry;

extern __visible kprobe_opcode_t optprobe_template_val;

extern __visible kprobe_opcode_t optprobe_template_call;

extern __visible kprobe_opcode_t optprobe_template_end;

extern __visible kprobe_opcode_t optprobe_template_sub_sp;

extern __visible kprobe_opcode_t optprobe_template_add_sp;



#define MAX_OPTIMIZED_LENGTH	4

#define MAX_OPTINSN_SIZE				\

	((unsigned long)&optprobe_template_end -	\

	 (unsigned long)&optprobe_template_entry)

#define RELATIVEJUMP_SIZE	4



struct arch_optimized_insn {

	/*

	 * copy of the original instructions.

	 * Different from x86, ARM kprobe_opcode_t is u32.

	 */

#define MAX_COPIED_INSN	DIV_ROUND_UP(RELATIVEJUMP_SIZE, sizeof(kprobe_opcode_t))

	kprobe_opcode_t copied_insn[MAX_COPIED_INSN];

	/* detour code buffer */

	kprobe_opcode_t *insn;

	/*

	 * We always copy one instruction on ARM,

	 * so size will always be 4, and unlike x86, there is no

	 * need for a size field.

	 */

};



#endif /* _ARM_KPROBES_H */

arch/arm/kernel/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -52,7 +52,7 @@ obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o insn.o 
obj-$(CONFIG_JUMP_LABEL)	+= jump_label.o insn.o patch.o

obj-$(CONFIG_KEXEC)		+= machine_kexec.o relocate_kernel.o

# Main staffs in KPROBES are in arch/arm/probes/ .

obj-$(CONFIG_KPROBES)		+= patch.o

obj-$(CONFIG_KPROBES)		+= patch.o insn.o

obj-$(CONFIG_OABI_COMPAT)	+= sys_oabi-compat.o

obj-$(CONFIG_ARM_THUMBEE)	+= thumbee.o

obj-$(CONFIG_KGDB)		+= kgdb.o patch.o

arch/arm/kernel/ftrace.c

+1 −2
Original line number Diff line number Diff line
@@ -20,8 +20,7 @@ 
#include <asm/cacheflush.h>

#include <asm/opcodes.h>

#include <asm/ftrace.h>



#include "insn.h"

#include <asm/insn.h>



#ifdef CONFIG_THUMB2_KERNEL

#define	NOP		0xf85deb04	/* pop.w {lr} */

CRA Git | Maintained and supported by SUSTech CRA and CCSE