Commit 0d877081 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus 

Pull MIPS updates from Ralf Baechle:
 "This week's round of MIPS fixes:
   - Fix JZ4740 build
   - Fix fallback to GFP_DMA
   - FP seccomp in case of ENOSYS
   - Fix bootmem panic
   - A number of FP and CPS fixes
   - Wire up new syscalls
   - Make sure BPF assembler objects can properly be disassembled
   - Fix BPF assembler code for MIPS I"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: scall: Always run the seccomp syscall filters
  MIPS: Octeon: Fix kernel panic on startup from memory corruption
  MIPS: Fix R2300 FP context switch handling
  MIPS: Fix octeon FP context switch handling
  MIPS: BPF: Fix load delay slots.
  MIPS: BPF: Do all exports of symbols with FEXPORT().
  MIPS: Fix the build on jz4740 after removing the custom gpio.h
  MIPS: CPS: #ifdef on CONFIG_MIPS_MT_SMP rather than CONFIG_MIPS_MT
  MIPS: CPS: Don't include MT code in non-MT kernels.
  MIPS: CPS: Stop dangling delay slot from has_mt.
  MIPS: dma-default: Fix 32-bit fall back to GFP_DMA
  MIPS: Wire up userfaultfd and membarrier syscalls.
parents 3e519dde d218af78

arch/mips/cavium-octeon/setup.c

+1 −1
Original line number Diff line number Diff line
@@ -933,7 +933,7 @@ void __init plat_mem_setup(void) 
	while ((boot_mem_map.nr_map < BOOT_MEM_MAP_MAX)

		&& (total < MAX_MEMORY)) {

		memory = cvmx_bootmem_phy_alloc(mem_alloc_size,

						__pa_symbol(&__init_end), -1,

						__pa_symbol(&_end), -1,

						0x100000,

						CVMX_BOOTMEM_FLAG_NO_LOCKING);

		if (memory >= 0) {

arch/mips/include/uapi/asm/unistd.h

+12 −6
Original line number Diff line number Diff line
@@ -377,16 +377,18 @@ 
#define __NR_memfd_create		(__NR_Linux + 354)

#define __NR_bpf			(__NR_Linux + 355)

#define __NR_execveat			(__NR_Linux + 356)

#define __NR_userfaultfd		(__NR_Linux + 357)

#define __NR_membarrier			(__NR_Linux + 358)



/*

 * Offset of the last Linux o32 flavoured syscall

 */

#define __NR_Linux_syscalls		356

#define __NR_Linux_syscalls		358



#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */



#define __NR_O32_Linux			4000

#define __NR_O32_Linux_syscalls		356

#define __NR_O32_Linux_syscalls		358



#if _MIPS_SIM == _MIPS_SIM_ABI64
@@ -711,16 +713,18 @@ 
#define __NR_memfd_create		(__NR_Linux + 314)

#define __NR_bpf			(__NR_Linux + 315)

#define __NR_execveat			(__NR_Linux + 316)

#define __NR_userfaultfd		(__NR_Linux + 317)

#define __NR_membarrier			(__NR_Linux + 318)



/*

 * Offset of the last Linux 64-bit flavoured syscall

 */

#define __NR_Linux_syscalls		316

#define __NR_Linux_syscalls		318



#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */



#define __NR_64_Linux			5000

#define __NR_64_Linux_syscalls		316

#define __NR_64_Linux_syscalls		318



#if _MIPS_SIM == _MIPS_SIM_NABI32
@@ -1049,15 +1053,17 @@ 
#define __NR_memfd_create		(__NR_Linux + 318)

#define __NR_bpf			(__NR_Linux + 319)

#define __NR_execveat			(__NR_Linux + 320)

#define __NR_userfaultfd		(__NR_Linux + 321)

#define __NR_membarrier			(__NR_Linux + 322)



/*

 * Offset of the last N32 flavoured syscall

 */

#define __NR_Linux_syscalls		320

#define __NR_Linux_syscalls		322



#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */



#define __NR_N32_Linux			6000

#define __NR_N32_Linux_syscalls		320

#define __NR_N32_Linux_syscalls		322



#endif /* _UAPI_ASM_UNISTD_H */

arch/mips/jz4740/board-qi_lb60.c

+1 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ 
#include <linux/power/jz4740-battery.h>

#include <linux/power/gpio-charger.h>



#include <asm/mach-jz4740/gpio.h>

#include <asm/mach-jz4740/jz4740_fb.h>

#include <asm/mach-jz4740/jz4740_mmc.h>

#include <asm/mach-jz4740/jz4740_nand.h>

arch/mips/jz4740/gpio.c

+1 −0
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ 
#include <linux/seq_file.h>



#include <asm/mach-jz4740/base.h>

#include <asm/mach-jz4740/gpio.h>



#define JZ4740_GPIO_BASE_A (32*0)

#define JZ4740_GPIO_BASE_B (32*1)

arch/mips/kernel/cps-vec.S

+7 −5
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ 
	 mfc0	\dest, CP0_CONFIG, 3

	andi	\dest, \dest, MIPS_CONF3_MT

	beqz	\dest, \nomt

	 nop

	.endm



.section .text.cps-vec
@@ -223,10 +224,9 @@ LEAF(excep_ejtag) 
	END(excep_ejtag)



LEAF(mips_cps_core_init)

#ifdef CONFIG_MIPS_MT

#ifdef CONFIG_MIPS_MT_SMP

	/* Check that the core implements the MT ASE */

	has_mt	t0, 3f

	 nop



	.set	push

	.set	mips64r2
@@ -310,8 +310,9 @@ LEAF(mips_cps_boot_vpes) 
	PTR_ADDU t0, t0, t1



	/* Calculate this VPEs ID. If the core doesn't support MT use 0 */

	has_mt	ta2, 1f

	li	t9, 0

#ifdef CONFIG_MIPS_MT_SMP

	has_mt	ta2, 1f



	/* Find the number of VPEs present in the core */

	mfc0	t1, CP0_MVPCONF0
@@ -330,6 +331,7 @@ LEAF(mips_cps_boot_vpes) 
	/* Retrieve the VPE ID from EBase.CPUNum */

	mfc0	t9, $15, 1

	and	t9, t9, t1

#endif



1:	/* Calculate a pointer to this VPEs struct vpe_boot_config */

	li	t1, VPEBOOTCFG_SIZE
@@ -337,7 +339,7 @@ LEAF(mips_cps_boot_vpes) 
	PTR_L	ta3, COREBOOTCFG_VPECONFIG(t0)

	PTR_ADDU v0, v0, ta3



#ifdef CONFIG_MIPS_MT

#ifdef CONFIG_MIPS_MT_SMP



	/* If the core doesn't support MT then return */

	bnez	ta2, 1f
@@ -451,7 +453,7 @@ LEAF(mips_cps_boot_vpes) 


2:	.set	pop



#endif /* CONFIG_MIPS_MT */

#endif /* CONFIG_MIPS_MT_SMP */



	/* Return */

	jr	ra

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