Commit 0d817768 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'omap-for-v4.13/dt-part2-signed' of... 

Merge tag 'omap-for-v4.13/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Second set of device tree changes for omaps for v4.13 merge
window:

- Updates for droid 4 proximity sensor, WLAN and battery

- Configure clocks for remoteproc devices for omap5 and dra7

- Configure omap4 crypto accelerators

* tag 'omap-for-v4.13/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

:
  ARM: dts: omap4: add SHAM node
  ARM: dts: omap4: add aes2 instance
  ARM: dts: omap4.dtsi: remove aes[12]_fck
  ARM: dts: omap4: Fix aes entry
  ARM: dts: omap4-droid4: Configure CPCAP battery driver
  ARM: dts: dra7xx-clocks: Use DPLL_GPU for GPU clocks
  ARM: dts: dra7xx-clocks: Set IVA DPLL and its output clock rates
  ARM: dts: dra7xx-clocks: Set DSP DPLL and its output clock rates
  ARM: dts: dra7xx-clocks: Source IPU1 functional clock from CORE DPLL
  ARM: dts: omap54xx-clocks: Set IVA DPLL and its output clock rates
  ARM: dts: omap44xx-clocks: Set IVA DPLL and its output clock rates
  ARM: dts: omap4-droid4: Fix WLAN compatible
  ARM: dts: omap4-droid4: Add isl29030 ALS/proximity sensor

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 4daea499 45f1d5e3

arch/arm/boot/dts/dra7xx-clocks.dtsi

+20 −0
Original line number Diff line number Diff line
@@ -338,6 +338,8 @@ 
		compatible = "ti,omap4-dpll-clock";

		clocks = <&sys_clkin1>, <&dpll_dsp_byp_mux>;

		reg = <0x0234>, <0x0238>, <0x0240>, <0x023c>;

		assigned-clocks = <&dpll_dsp_ck>;

		assigned-clock-rates = <600000000>;

	};



	dpll_dsp_m2_ck: dpll_dsp_m2_ck@244 {
@@ -349,6 +351,8 @@ 
		reg = <0x0244>;

		ti,index-starts-at-one;

		ti,invert-autoidle-bit;

		assigned-clocks = <&dpll_dsp_m2_ck>;

		assigned-clock-rates = <600000000>;

	};



	iva_dpll_hs_clk_div: iva_dpll_hs_clk_div {
@@ -372,6 +376,8 @@ 
		compatible = "ti,omap4-dpll-clock";

		clocks = <&sys_clkin1>, <&dpll_iva_byp_mux>;

		reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;

		assigned-clocks = <&dpll_iva_ck>;

		assigned-clock-rates = <1165000000>;

	};



	dpll_iva_m2_ck: dpll_iva_m2_ck@1b0 {
@@ -383,6 +389,8 @@ 
		reg = <0x01b0>;

		ti,index-starts-at-one;

		ti,invert-autoidle-bit;

		assigned-clocks = <&dpll_iva_m2_ck>;

		assigned-clock-rates = <388333334>;

	};



	iva_dclk: iva_dclk {
@@ -406,6 +414,8 @@ 
		compatible = "ti,omap4-dpll-clock";

		clocks = <&sys_clkin1>, <&dpll_gpu_byp_mux>;

		reg = <0x02d8>, <0x02dc>, <0x02e4>, <0x02e0>;

		assigned-clocks = <&dpll_gpu_ck>;

		assigned-clock-rates = <1277000000>;

	};



	dpll_gpu_m2_ck: dpll_gpu_m2_ck@2e8 {
@@ -417,6 +427,8 @@ 
		reg = <0x02e8>;

		ti,index-starts-at-one;

		ti,invert-autoidle-bit;

		assigned-clocks = <&dpll_gpu_m2_ck>;

		assigned-clock-rates = <425666667>;

	};



	dpll_core_m2_ck: dpll_core_m2_ck@130 {
@@ -659,6 +671,8 @@ 
		reg = <0x0248>;

		ti,index-starts-at-one;

		ti,invert-autoidle-bit;

		assigned-clocks = <&dpll_dsp_m3x2_ck>;

		assigned-clock-rates = <400000000>;

	};



	dpll_gmac_x2_ck: dpll_gmac_x2_ck {
@@ -791,6 +805,8 @@ 
		clocks = <&dpll_abe_m2x2_ck>, <&dpll_core_h22x2_ck>;

		ti,bit-shift = <24>;

		reg = <0x0520>;

		assigned-clocks = <&ipu1_gfclk_mux>;

		assigned-clock-parents = <&dpll_core_h22x2_ck>;

	};



	mcasp1_ahclkr_mux: mcasp1_ahclkr_mux@550 {
@@ -1748,6 +1764,8 @@ 
		clocks = <&dpll_core_h14x2_ck>, <&dpll_per_h14x2_ck>, <&dpll_gpu_m2_ck>;

		ti,bit-shift = <24>;

		reg = <0x1220>;

		assigned-clocks = <&gpu_core_gclk_mux>;

		assigned-clock-parents = <&dpll_gpu_m2_ck>;

	};



	gpu_hyd_gclk_mux: gpu_hyd_gclk_mux@1220 {
@@ -1756,6 +1774,8 @@ 
		clocks = <&dpll_core_h14x2_ck>, <&dpll_per_h14x2_ck>, <&dpll_gpu_m2_ck>;

		ti,bit-shift = <26>;

		reg = <0x1220>;

		assigned-clocks = <&gpu_hyd_gclk_mux>;

		assigned-clock-parents = <&dpll_gpu_m2_ck>;

	};



	l3instr_ts_gclk_div: l3instr_ts_gclk_div@e50 {

arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -26,6 +26,22 @@ 
			#io-channel-cells = <1>;

		};



		cpcap_battery: battery {

			compatible = "motorola,cpcap-battery";

			interrupts-extended = <

				&cpcap 6 0 &cpcap 5 0 &cpcap 3 0

				&cpcap 20 0 &cpcap 54 0

			>;

			interrupt-names =

				"eol", "lowbph", "lowbpl",

				"chrgcurr1", "battdetb";

			io-channels = <&cpcap_adc 0 &cpcap_adc 1

				       &cpcap_adc 5 &cpcap_adc 6>;

			io-channel-names = "battdetb", "battp",

					   "chg_isense", "batti";

			power-supplies = <&cpcap_charger>;

		};



		cpcap_charger: charger {

			compatible = "motorola,mapphone-cpcap-charger";

			interrupts-extended = <

arch/arm/boot/dts/omap4-droid4-xt894.dts

+18 −1
Original line number Diff line number Diff line
@@ -301,7 +301,7 @@ 
	#address-cells = <1>;

	#size-cells = <0>;

	wlcore: wlcore@2 {

		compatible = "ti,wl1283";

		compatible = "ti,wl1285", "ti,wl1283";

		reg = <2>;

		interrupt-parent = <&gpio4>;

		interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; /* gpio100 */
@@ -348,6 +348,17 @@ 
		interrupt-names = "irq", "wakeup";

		wakeup-source;

	};



	isl29030@44 {

		compatible = "isil,isl29030";

		reg = <0x44>;



		pinctrl-names = "default";

		pinctrl-0 = <&als_proximity_pins>;



		interrupt-parent = <&gpio6>;

		interrupts = <17 IRQ_TYPE_LEVEL_LOW>; /* gpio177 */

	};

};



&omap4_pmx_core {
@@ -395,6 +406,12 @@ 
		>;

	};



	als_proximity_pins: pinmux_als_proximity_pins {

		pinctrl-single,pins = <

		OMAP4_IOPAD(0x18c, PIN_INPUT_PULLUP | MUX_MODE3)

		>;

	};



	usb_ulpi_pins: pinmux_usb_ulpi_pins {

		pinctrl-single,pins = <

		OMAP4_IOPAD(0x196, MUX_MODE7)

arch/arm/boot/dts/omap4.dtsi

+20 −2
Original line number Diff line number Diff line
@@ -900,15 +900,24 @@ 
			ctrl-module = <&omap_control_usbotg>;

		};



		aes: aes@4b501000 {

		aes1: aes@4b501000 {

			compatible = "ti,omap4-aes";

			ti,hwmods = "aes";

			ti,hwmods = "aes1";

			reg = <0x4b501000 0xa0>;

			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;

			dmas = <&sdma 111>, <&sdma 110>;

			dma-names = "tx", "rx";

		};



		aes2: aes@4b701000 {

			compatible = "ti,omap4-aes";

			ti,hwmods = "aes2";

			reg = <0x4b701000 0xa0>;

			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;

			dmas = <&sdma 114>, <&sdma 113>;

			dma-names = "tx", "rx";

		};



		des: des@480a5000 {

			compatible = "ti,omap4-des";

			ti,hwmods = "des";
@@ -918,6 +927,15 @@ 
			dma-names = "tx", "rx";

		};



		sham: sham@4b100000 {

			compatible = "ti,omap4-sham";

			ti,hwmods = "sham";

			reg = <0x4b100000 0x300>;

			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;

			dmas = <&sdma 119>;

			dma-names = "rx";

		};



		abb_mpu: regulator-abb-mpu {

			compatible = "ti,abb-v2";

			regulator-name = "abb_mpu";

arch/arm/boot/dts/omap44xx-clocks.dtsi

+6 −16
Original line number Diff line number Diff line
@@ -357,6 +357,8 @@ 
		compatible = "ti,omap4-dpll-clock";

		clocks = <&sys_clkin_ck>, <&iva_hsd_byp_clk_mux_ck>;

		reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;

		assigned-clocks = <&dpll_iva_ck>;

		assigned-clock-rates = <931200000>;

	};



	dpll_iva_x2_ck: dpll_iva_x2_ck {
@@ -374,6 +376,8 @@ 
		reg = <0x01b8>;

		ti,index-starts-at-one;

		ti,invert-autoidle-bit;

		assigned-clocks = <&dpll_iva_m4x2_ck>;

		assigned-clock-rates = <465600000>;

	};



	dpll_iva_m5x2_ck: dpll_iva_m5x2_ck@1bc {
@@ -385,6 +389,8 @@ 
		reg = <0x01bc>;

		ti,index-starts-at-one;

		ti,invert-autoidle-bit;

		assigned-clocks = <&dpll_iva_m5x2_ck>;

		assigned-clock-rates = <266100000>;

	};



	dpll_mpu_ck: dpll_mpu_ck@160 {
@@ -969,22 +975,6 @@ 
		ti,max-div = <2>;

	};



	aes1_fck: aes1_fck@15a0 {

		#clock-cells = <0>;

		compatible = "ti,gate-clock";

		clocks = <&l3_div_ck>;

		ti,bit-shift = <1>;

		reg = <0x15a0>;

	};



	aes2_fck: aes2_fck@15a8 {

		#clock-cells = <0>;

		compatible = "ti,gate-clock";

		clocks = <&l3_div_ck>;

		ti,bit-shift = <1>;

		reg = <0x15a8>;

	};



	dss_sys_clk: dss_sys_clk@1120 {

		#clock-cells = <0>;

		compatible = "ti,gate-clock";

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