Commit 0d583273 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'baikal/drivers' into arm/drivers

[arnd: This is a patch series from Serge Semin to add a few drivers
 that don't have any other subsystem maintainer tree to go through,
 so I'm picking them up through the soc tree, full series description
 from the mailing list below]

Baikal-T1 SoC CPU is based on two MIPS Warrior P5600 cores. Their main
memory Non-Coherent IO interface is connected to the OCP2AXI bridge,
which in turn is then connected to the DW AMBA 3 AXI Interconnect (so
called Main Interconnect) with nine masters and four slaves ports. Main
Interconnect is responsible for the AXI-bus traffic arbitration (QoS)
and its routing from one component to another. In addition there is
a Errors Handler Block (EHB) accesible by means of the Baikal-T1 SoC
System Controller responsible to detect AXI protocol errors and device
not responding situations built on top the interconnect. Baikal-T1 AXI-bus
driver included in this patchset will be responsible for working with that
functionality, though currently it doesn't support QoS tuning. Instead
it's capable of detecting the error events, reporting an info about
them to the system log, injecting artificial errors to test the driver
functionality. Since AXI Interconnect doesn't provide a way to find
out which devices are connected to it, so its DT node is supposed to
be compatible with "simple-bus" driver, while sub-nodes shall represent
the masters attached to the bus.

One of the AXI Interconnect slaves is an AXI-APB bridge used to access the
Baikal-T1 SoC subsystems CSRs. MMIO request from CPU and DMAC masters are
routed there if they are detected to be within [0x08000000 0x1FFFFFFF]
range of the physical memory. In case if an attempted APB transaction
stays with no response for a pre-defined time it will be detected by
the APB-bus Errors Handler Block (EHB), which will raise an interrupt,
then the bus gets freed for a next operation. The APB-bus driver provides
the interrupt handler to detect the erroneous address, update an errors
counter and prints an error message about the faulty address. The counter
and the APB-bus operations timeout can be accessed via corresponding sysfs
nodes. A dedicated sysfs-node can be also used to artificially cause the
bus errors described above. Since APB-bus is a platform bus, it doesn't
provide a way to detect slave devices connected to it, so similarly to
the AXI-bus it's also supposed to be compatible with "simple-bus" driver.

Aside from PCIe/SATA/DDR/I2C/EHB/CPU/reboot specific settings the
Baikal-T1 System Controller provides a MIPS P5600 CM2 L2-cache tuning
block. It is responsible for the setting up the Tag/Data/WS L2-to-RAM
latencies. The last small patch in this patchset provides a driver and
DT-schema-based binding for the described device. So that the latencies
can be tuned up by means of dedicated DT properties and sysfs nodes.

This patchset is rebased and tested on the mainline Linux kernel
5.7-rc4.

Changelog v2 (AXI/APB bus):
- Assign dual GPL/BSD licenses to the bindings.
- Use single lined copyright headers in the bindings.
- Replace "additionalProperties: false" property with
  "unevaluatedProperties: false" in the bindings.
- Don't use a multi-arg clock phandle reference in DT binding examples.
  Thus remove includes from there.
- Fix some commit message and Kconfig help text spelling.
- Move drivers from soc to the bus subsystem.
- Convert a simple EHB drivers to the Baikal-T1 AXI and APB bus ones.
- Convert APB bus driver to using regmap MMIO API.
- Use syscon regmap to access the AXI-bus erroneous address.
- Add reset line support.
- Add Main Interconnect clock support to the AXI-bus driver.
- Remove probe-status info string printout.
- Discard of_match_ptr() macro utilization.
- Don't print error-message if no platform IRQ found. Just return an
  error.
- Use generic FIELD_{GET,PREP} macros instead of handwritten ones in the
  AXI-bus driver.

Changelog v2 (l2 driver):
- Fix some commit message and Kconfig help text spelling.
- Move the driver to the memory subsystem.
- Assign dual GPL/BSD license to the DT binding.
- Use single lined copyright header in the binding.
- Discard reg property and syscon compatible string.
- Move "allOf" restrictions to the root level of the properties.
- The DT node is supposed to be a child of the Baikal-T1 system
  controller node. So regmap will be fetched from there.
- Use generic FIELD_{GET,PREP} macro.
- Remove probe-status info string printout.
- Since the driver depends on the OF config we can remove of_match_ptr()
  macro utilization.

Changelog v3:
- Combine l2 and AXI/APB bus patches in a single patchset.
- Retrieve AXI-bus QoS registers by resource name "qos".
- Discard CONFIG_OF dependency since there is none at compile-time.
- Add syscon EHB registers range to the AXI-bus reg property as optional
  entry.
- Fix invalid of_property_read_u32() return value test in the l2-ctl
  driver.
- Get the reg property back into the l2-ctl DT bindings even though the
  driver is using the parental syscon regmap.
- The l2-ctl DT schema will live separately from the system controller,
  but the corresponding sub-node of the later DT schema will $ref this
  one.
- Set non-default latencies in the l2-ctl DT example.

* baikal/drivers:
  memory: Add Baikal-T1 L2-cache Control Block driver
  bus: Add Baikal-T1 APB-bus driver
  bus: Add Baikal-T1 AXI-bus driver
  dt-bindings: bus: Add Baikal-T1 APB-bus binding
  dt-bindings: bus: Add Baikal-T1 AXI-bus binding

Link: https://lore.kernel.org/lkml/20200526130841.ap6qlxv7hqmabnh5@mobilestation/


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 9536a315 83ca8b3e
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
%YAML 1.2
---
$id: http://devicetree.org/schemas/bus/baikal,bt1-apb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Baikal-T1 APB-bus

maintainers:
  - Serge Semin <fancer.lancer@gmail.com>

description: |
  Baikal-T1 CPU or DMAC MMIO requests are handled by the AMBA 3 AXI Interconnect
  which routes them to the AXI-APB bridge. This interface is a single master
  multiple slaves bus in turn serializing IO accesses and routing them to the
  addressed APB slave devices. In case of any APB protocol collisions, slave
  device not responding on timeout an IRQ is raised with an erroneous address
  reported to the APB terminator (APB Errors Handler Block).

allOf:
 - $ref: /schemas/simple-bus.yaml#

properties:
  compatible:
    contains:
      const: baikal,bt1-apb

  reg:
    items:
      - description: APB EHB MMIO registers
      - description: APB MMIO region with no any device mapped

  reg-names:
    items:
      - const: ehb
      - const: nodev

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: APB reference clock

  clock-names:
    items:
      - const: pclk

  resets:
    items:
      - description: APB domain reset line

  reset-names:
    items:
      - const: prst

unevaluatedProperties: false

required:
  - compatible
  - reg
  - reg-names
  - interrupts
  - clocks
  - clock-names

examples:
  - |
    #include <dt-bindings/interrupt-controller/mips-gic.h>

    bus@1f059000 {
      compatible = "baikal,bt1-apb", "simple-bus";
      reg = <0 0x1f059000 0 0x1000>,
            <0 0x1d000000 0 0x2040000>;
      reg-names = "ehb", "nodev";
      #address-cells = <1>;
      #size-cells = <1>;

      ranges;

      interrupts = <GIC_SHARED 16 IRQ_TYPE_LEVEL_HIGH>;

      clocks = <&ccu_sys 1>;
      clock-names = "pclk";

      resets = <&ccu_sys 1>;
      reset-names = "prst";
    };
...
+107 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
%YAML 1.2
---
$id: http://devicetree.org/schemas/bus/baikal,bt1-axi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Baikal-T1 AXI-bus

maintainers:
  - Serge Semin <fancer.lancer@gmail.com>

description: |
  AXI3-bus is the main communication bus of Baikal-T1 SoC connecting all
  high-speed peripheral IP-cores with RAM controller and with MIPS P5600
  cores. Traffic arbitration is done by means of DW AXI Interconnect (so
  called AXI Main Interconnect) routing IO requests from one block to
  another: from CPU to SoC peripherals and between some SoC peripherals
  (mostly between peripheral devices and RAM, but also between DMA and
  some peripherals). In case of any protocol error, device not responding
  an IRQ is raised and a faulty situation is reported to the AXI EHB
  (Errors Handler Block) embedded on top of the DW AXI Interconnect and
  accessible by means of the Baikal-T1 System Controller.

allOf:
 - $ref: /schemas/simple-bus.yaml#

properties:
  compatible:
    contains:
      const: baikal,bt1-axi

  reg:
    minItems: 1
    items:
      - description: Synopsys DesignWare AXI Interconnect QoS registers
      - description: AXI EHB MMIO system controller registers

  reg-names:
    minItems: 1
    items:
      - const: qos
      - const: ehb

  '#interconnect-cells':
    const: 1

  syscon:
    $ref: /schemas/types.yaml#definitions/phandle
    description: Phandle to the Baikal-T1 System Controller DT node

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: Main Interconnect uplink reference clock

  clock-names:
    items:
      - const: aclk

  resets:
    items:
      - description: Main Interconnect reset line

  reset-names:
    items:
      - const: arst

unevaluatedProperties: false

required:
  - compatible
  - reg
  - reg-names
  - syscon
  - interrupts
  - clocks
  - clock-names

examples:
  - |
    #include <dt-bindings/interrupt-controller/mips-gic.h>

    bus@1f05a000 {
      compatible = "baikal,bt1-axi", "simple-bus";
      reg = <0 0x1f05a000 0 0x1000>,
            <0 0x1f04d110 0 0x8>;
      reg-names = "qos", "ehb";
      #address-cells = <1>;
      #size-cells = <1>;
      #interconnect-cells = <1>;

      syscon = <&syscon>;

      ranges;

      interrupts = <GIC_SHARED 127 IRQ_TYPE_LEVEL_HIGH>;

      clocks = <&ccu_axi 0>;
      clock-names = "aclk";

      resets = <&ccu_axi 0>;
      reset-names = "arst";
    };
...
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@@ -29,6 +29,36 @@ config BRCMSTB_GISB_ARB
	  arbiter. This driver provides timeout and target abort error handling
	  and internal bus master decoding.

config BT1_APB
	tristate "Baikal-T1 APB-bus driver"
	depends on MIPS_BAIKAL_T1 || COMPILE_TEST
	select REGMAP_MMIO
	help
	  Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
	  IO requests are routed to this bus by means of the DW AMBA 3 AXI
	  Interconnect. In case of any APB protocol collisions, slave device
	  not responding on timeout an IRQ is raised with an erroneous address
	  reported to the APB terminator (APB Errors Handler Block). This
	  driver provides the interrupt handler to detect the erroneous
	  address, prints an error message about the address fault, updates an
	  errors counter. The counter and the APB-bus operations timeout can be
	  accessed via corresponding sysfs nodes.

config BT1_AXI
	tristate "Baikal-T1 AXI-bus driver"
	depends on MIPS_BAIKAL_T1 || COMPILE_TEST
	select MFD_SYSCON
	help
	  AXI3-bus is the main communication bus connecting all high-speed
	  peripheral IP-cores with RAM controller and with MIPS P5600 cores on
	  Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI
	  Interconnect (so called AXI Main Interconnect) routing IO requests
	  from one SoC block to another. This driver provides a way to detect
	  any bus protocol errors and device not responding situations by
	  means of an embedded on top of the interconnect errors handler
	  block (EHB). AXI Interconnect QoS arbitration tuning is currently
	  unsupported.

config MOXTET
	tristate "CZ.NIC Turris Mox module configuration bus"
	depends on SPI_MASTER && OF
+2 −0
Original line number Diff line number Diff line
@@ -13,6 +13,8 @@ obj-$(CONFIG_MOXTET) += moxtet.o
# DPAA2 fsl-mc bus
obj-$(CONFIG_FSL_MC_BUS)	+= fsl-mc/

obj-$(CONFIG_BT1_APB)		+= bt1-apb.o
obj-$(CONFIG_BT1_AXI)		+= bt1-axi.o
obj-$(CONFIG_IMX_WEIM)		+= imx-weim.o
obj-$(CONFIG_MIPS_CDMM)		+= mips_cdmm.o
obj-$(CONFIG_MVEBU_MBUS) 	+= mvebu-mbus.o

drivers/bus/bt1-apb.c

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// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
 *
 * Authors:
 *   Serge Semin <Sergey.Semin@baikalelectronics.ru>
 *
 * Baikal-T1 APB-bus driver
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/device.h>
#include <linux/atomic.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/nmi.h>
#include <linux/of.h>
#include <linux/regmap.h>
#include <linux/clk.h>
#include <linux/reset.h>
#include <linux/time64.h>
#include <linux/clk.h>
#include <linux/sysfs.h>

#define APB_EHB_ISR			0x00
#define APB_EHB_ISR_PENDING		BIT(0)
#define APB_EHB_ISR_MASK		BIT(1)
#define APB_EHB_ADDR			0x04
#define APB_EHB_TIMEOUT			0x08

#define APB_EHB_TIMEOUT_MIN		0x000003FFU
#define APB_EHB_TIMEOUT_MAX		0xFFFFFFFFU

/*
 * struct bt1_apb - Baikal-T1 APB EHB private data
 * @dev: Pointer to the device structure.
 * @regs: APB EHB registers map.
 * @res: No-device error injection memory region.
 * @irq: Errors IRQ number.
 * @rate: APB-bus reference clock rate.
 * @pclk: APB-reference clock.
 * @prst: APB domain reset line.
 * @count: Number of errors detected.
 */
struct bt1_apb {
	struct device *dev;

	struct regmap *regs;
	void __iomem *res;
	int irq;

	unsigned long rate;
	struct clk *pclk;

	struct reset_control *prst;

	atomic_t count;
};

static const struct regmap_config bt1_apb_regmap_cfg = {
	.reg_bits = 32,
	.val_bits = 32,
	.reg_stride = 4,
	.max_register = APB_EHB_TIMEOUT,
	.fast_io = true
};

static inline unsigned long bt1_apb_n_to_timeout_us(struct bt1_apb *apb, u32 n)
{
	u64 timeout = (u64)n * USEC_PER_SEC;

	do_div(timeout, apb->rate);

	return timeout;

}

static inline unsigned long bt1_apb_timeout_to_n_us(struct bt1_apb *apb,
						    unsigned long timeout)
{
	u64 n = (u64)timeout * apb->rate;

	do_div(n, USEC_PER_SEC);

	return n;

}

static irqreturn_t bt1_apb_isr(int irq, void *data)
{
	struct bt1_apb *apb = data;
	u32 addr = 0;

	regmap_read(apb->regs, APB_EHB_ADDR, &addr);

	dev_crit_ratelimited(apb->dev,
		"APB-bus fault %d: Slave access timeout at 0x%08x\n",
		atomic_inc_return(&apb->count),
		addr);

	/*
	 * Print backtrace on each CPU. This might be pointless if the fault
	 * has happened on the same CPU as the IRQ handler is executed or
	 * the other core proceeded further execution despite the error.
	 * But if it's not, by looking at the trace we would get straight to
	 * the cause of the problem.
	 */
	trigger_all_cpu_backtrace();

	regmap_update_bits(apb->regs, APB_EHB_ISR, APB_EHB_ISR_PENDING, 0);

	return IRQ_HANDLED;
}

static void bt1_apb_clear_data(void *data)
{
	struct bt1_apb *apb = data;
	struct platform_device *pdev = to_platform_device(apb->dev);

	platform_set_drvdata(pdev, NULL);
}

static struct bt1_apb *bt1_apb_create_data(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct bt1_apb *apb;
	int ret;

	apb = devm_kzalloc(dev, sizeof(*apb), GFP_KERNEL);
	if (!apb)
		return ERR_PTR(-ENOMEM);

	ret = devm_add_action(dev, bt1_apb_clear_data, apb);
	if (ret) {
		dev_err(dev, "Can't add APB EHB data clear action\n");
		return ERR_PTR(ret);
	}

	apb->dev = dev;
	atomic_set(&apb->count, 0);
	platform_set_drvdata(pdev, apb);

	return apb;
}

static int bt1_apb_request_regs(struct bt1_apb *apb)
{
	struct platform_device *pdev = to_platform_device(apb->dev);
	void __iomem *regs;

	regs = devm_platform_ioremap_resource_byname(pdev, "ehb");
	if (IS_ERR(regs)) {
		dev_err(apb->dev, "Couldn't map APB EHB registers\n");
		return PTR_ERR(regs);
	}

	apb->regs = devm_regmap_init_mmio(apb->dev, regs, &bt1_apb_regmap_cfg);
	if (IS_ERR(apb->regs)) {
		dev_err(apb->dev, "Couldn't create APB EHB regmap\n");
		return PTR_ERR(apb->regs);
	}

	apb->res = devm_platform_ioremap_resource_byname(pdev, "nodev");
	if (IS_ERR(apb->res)) {
		dev_err(apb->dev, "Couldn't map reserved region\n");
		return PTR_ERR(apb->res);
	}

	return 0;
}

static int bt1_apb_request_rst(struct bt1_apb *apb)
{
	int ret;

	apb->prst = devm_reset_control_get_optional_exclusive(apb->dev, "prst");
	if (IS_ERR(apb->prst)) {
		dev_warn(apb->dev, "Couldn't get reset control line\n");
		return PTR_ERR(apb->prst);
	}

	ret = reset_control_deassert(apb->prst);
	if (ret)
		dev_err(apb->dev, "Failed to deassert the reset line\n");

	return ret;
}

static void bt1_apb_disable_clk(void *data)
{
	struct bt1_apb *apb = data;

	clk_disable_unprepare(apb->pclk);
}

static int bt1_apb_request_clk(struct bt1_apb *apb)
{
	int ret;

	apb->pclk = devm_clk_get(apb->dev, "pclk");
	if (IS_ERR(apb->pclk)) {
		dev_err(apb->dev, "Couldn't get APB clock descriptor\n");
		return PTR_ERR(apb->pclk);
	}

	ret = clk_prepare_enable(apb->pclk);
	if (ret) {
		dev_err(apb->dev, "Couldn't enable the APB clock\n");
		return ret;
	}

	ret = devm_add_action_or_reset(apb->dev, bt1_apb_disable_clk, apb);
	if (ret) {
		dev_err(apb->dev, "Can't add APB EHB clocks disable action\n");
		return ret;
	}

	apb->rate = clk_get_rate(apb->pclk);
	if (!apb->rate) {
		dev_err(apb->dev, "Invalid clock rate\n");
		return -EINVAL;
	}

	return 0;
}

static void bt1_apb_clear_irq(void *data)
{
	struct bt1_apb *apb = data;

	regmap_update_bits(apb->regs, APB_EHB_ISR, APB_EHB_ISR_MASK, 0);
}

static int bt1_apb_request_irq(struct bt1_apb *apb)
{
	struct platform_device *pdev = to_platform_device(apb->dev);
	int ret;

	apb->irq = platform_get_irq(pdev, 0);
	if (apb->irq < 0)
		return apb->irq;

	ret = devm_request_irq(apb->dev, apb->irq, bt1_apb_isr, IRQF_SHARED,
			       "bt1-apb", apb);
	if (ret) {
		dev_err(apb->dev, "Couldn't request APB EHB IRQ\n");
		return ret;
	}

	ret = devm_add_action(apb->dev, bt1_apb_clear_irq, apb);
	if (ret) {
		dev_err(apb->dev, "Can't add APB EHB IRQs clear action\n");
		return ret;
	}

	/* Unmask IRQ and clear it' pending flag. */
	regmap_update_bits(apb->regs, APB_EHB_ISR,
			   APB_EHB_ISR_PENDING | APB_EHB_ISR_MASK,
			   APB_EHB_ISR_MASK);

	return 0;
}

static ssize_t count_show(struct device *dev, struct device_attribute *attr,
			  char *buf)
{
	struct bt1_apb *apb = dev_get_drvdata(dev);

	return scnprintf(buf, PAGE_SIZE, "%d\n", atomic_read(&apb->count));
}
static DEVICE_ATTR_RO(count);

static ssize_t timeout_show(struct device *dev, struct device_attribute *attr,
			    char *buf)
{
	struct bt1_apb *apb = dev_get_drvdata(dev);
	unsigned long timeout;
	int ret;
	u32 n;

	ret = regmap_read(apb->regs, APB_EHB_TIMEOUT, &n);
	if (ret)
		return ret;

	timeout = bt1_apb_n_to_timeout_us(apb, n);

	return scnprintf(buf, PAGE_SIZE, "%lu\n", timeout);
}

static ssize_t timeout_store(struct device *dev,
			     struct device_attribute *attr,
			     const char *buf, size_t count)
{
	struct bt1_apb *apb = dev_get_drvdata(dev);
	unsigned long timeout;
	int ret;
	u32 n;

	if (kstrtoul(buf, 0, &timeout) < 0)
		return -EINVAL;

	n = bt1_apb_timeout_to_n_us(apb, timeout);
	n = clamp(n, APB_EHB_TIMEOUT_MIN, APB_EHB_TIMEOUT_MAX);

	ret = regmap_write(apb->regs, APB_EHB_TIMEOUT, n);

	return ret ?: count;
}
static DEVICE_ATTR_RW(timeout);

static ssize_t inject_error_show(struct device *dev, struct device_attribute *attr,
			     char *buf)
{
	return scnprintf(buf, PAGE_SIZE, "Error injection: nodev irq\n");
}

static ssize_t inject_error_store(struct device *dev,
			      struct device_attribute *attr,
			      const char *data, size_t count)
{
	struct bt1_apb *apb = dev_get_drvdata(dev);

	/*
	 * Either dummy read from the unmapped address in the APB IO area
	 * or manually set the IRQ status.
	 */
	if (!strncmp(data, "nodev", 5))
		readl(apb->res);
	else if (!strncmp(data, "irq", 3))
		regmap_update_bits(apb->regs, APB_EHB_ISR, APB_EHB_ISR_PENDING,
				   APB_EHB_ISR_PENDING);
	else
		return -EINVAL;

	return count;
}
static DEVICE_ATTR_RW(inject_error);

static struct attribute *bt1_apb_sysfs_attrs[] = {
	&dev_attr_count.attr,
	&dev_attr_timeout.attr,
	&dev_attr_inject_error.attr,
	NULL
};
ATTRIBUTE_GROUPS(bt1_apb_sysfs);

static void bt1_apb_remove_sysfs(void *data)
{
	struct bt1_apb *apb = data;

	device_remove_groups(apb->dev, bt1_apb_sysfs_groups);
}

static int bt1_apb_init_sysfs(struct bt1_apb *apb)
{
	int ret;

	ret = device_add_groups(apb->dev, bt1_apb_sysfs_groups);
	if (ret) {
		dev_err(apb->dev, "Failed to create EHB APB sysfs nodes\n");
		return ret;
	}

	ret = devm_add_action_or_reset(apb->dev, bt1_apb_remove_sysfs, apb);
	if (ret)
		dev_err(apb->dev, "Can't add APB EHB sysfs remove action\n");

	return ret;
}

static int bt1_apb_probe(struct platform_device *pdev)
{
	struct bt1_apb *apb;
	int ret;

	apb = bt1_apb_create_data(pdev);
	if (IS_ERR(apb))
		return PTR_ERR(apb);

	ret = bt1_apb_request_regs(apb);
	if (ret)
		return ret;

	ret = bt1_apb_request_rst(apb);
	if (ret)
		return ret;

	ret = bt1_apb_request_clk(apb);
	if (ret)
		return ret;

	ret = bt1_apb_request_irq(apb);
	if (ret)
		return ret;

	ret = bt1_apb_init_sysfs(apb);
	if (ret)
		return ret;

	return 0;
}

static const struct of_device_id bt1_apb_of_match[] = {
	{ .compatible = "baikal,bt1-apb" },
	{ }
};
MODULE_DEVICE_TABLE(of, bt1_apb_of_match);

static struct platform_driver bt1_apb_driver = {
	.probe = bt1_apb_probe,
	.driver = {
		.name = "bt1-apb",
		.of_match_table = bt1_apb_of_match
	}
};
module_platform_driver(bt1_apb_driver);

MODULE_AUTHOR("Serge Semin <Sergey.Semin@baikalelectronics.ru>");
MODULE_DESCRIPTION("Baikal-T1 APB-bus driver");
MODULE_LICENSE("GPL v2");
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