Commit 0d58280c authored by Can Guo's avatar Can Guo Committed by Kishon Vijay Abraham I
Browse files

phy: Update PHY power control sequence 



All PHYs should be powered on before register configuration starts. And
only PCIe PHYs need an extra power control before deasserts reset state.

Signed-off-by: default avatarCan Guo <cang@codeaurora.org>
Reviewed-by: default avatarManu Gautam <mgautam@codeaurora.org>
Reviewed-by: default avatarVivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: default avatarEvan Green <evgreen@chromium.org>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
parent 63bd0f19

drivers/phy/qualcomm/phy-qcom-qmp.c

+12 −7
Original line number Diff line number Diff line
@@ -935,10 +935,12 @@ static void qcom_qmp_phy_configure(void __iomem *base, 
	}

}



static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)

static int qcom_qmp_phy_com_init(struct qmp_phy *qphy)

{

	struct qcom_qmp *qmp = qphy->qmp;

	const struct qmp_phy_cfg *cfg = qmp->cfg;

	void __iomem *serdes = qmp->serdes;

	void __iomem *pcs = qphy->pcs;

	void __iomem *dp_com = qmp->dp_com;

	int ret, i;
@@ -979,10 +981,6 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp) 
		goto err_rst;

	}



	if (cfg->has_phy_com_ctrl)

		qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],

			     SW_PWRDN);



	if (cfg->has_phy_dp_com_ctrl) {

		qphy_setbits(dp_com, QPHY_V3_DP_COM_POWER_DOWN_CTRL,

			     SW_PWRDN);
@@ -1000,6 +998,12 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp) 
			     SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET);

	}



	if (cfg->has_phy_com_ctrl)

		qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],

			     SW_PWRDN);

	else

		qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);



	/* Serdes configuration */

	qcom_qmp_phy_configure(serdes, cfg->regs, cfg->serdes_tbl,

			       cfg->serdes_tbl_num);
@@ -1090,7 +1094,7 @@ static int qcom_qmp_phy_init(struct phy *phy) 


	dev_vdbg(qmp->dev, "Initializing QMP phy\n");



	ret = qcom_qmp_phy_com_init(qmp);

	ret = qcom_qmp_phy_com_init(qphy);

	if (ret)

		return ret;
@@ -1127,6 +1131,7 @@ static int qcom_qmp_phy_init(struct phy *phy) 
	 * Pull out PHY from POWER DOWN state.

	 * This is active low enable signal to power-down PHY.

	 */

	if(cfg->type == PHY_TYPE_PCIE)

		qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);



	if (cfg->has_pwrdn_delay)

CRA Git | Maintained and supported by SUSTech CRA and CCSE