Commit 0d4c351a authored by Pankaj Bharadiya's avatar Pankaj Bharadiya Committed by Jani Nikula
Browse files

drm/i915/gt: Make WARN* drm specific where drm_priv ptr is available 



drm specific WARN* calls include device information in the
backtrace, so we know what device the warnings originate from.

Covert all the calls of WARN* with device specific drm_WARN*
variants in functions where drm_i915_private struct pointer is readily
available.

The conversion was done automatically with below coccinelle semantic
patch. checkpatch errors/warnings are fixed manually.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<+...
(
-WARN(
+drm_WARN(&T->drm,
...)
|
-WARN_ON(
+drm_WARN_ON(&T->drm,
...)
|
-WARN_ONCE(
+drm_WARN_ONCE(&T->drm,
...)
|
-WARN_ON_ONCE(
+drm_WARN_ON_ONCE(&T->drm,
...)
)
...+>
}

@rule2@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<+...
(
-WARN(
+drm_WARN(&T->drm,
...)
|
-WARN_ON(
+drm_WARN_ON(&T->drm,
...)
|
-WARN_ONCE(
+drm_WARN_ONCE(&T->drm,
...)
|
-WARN_ON_ONCE(
+drm_WARN_ON_ONCE(&T->drm,
...)
)
...+>
}

command: spatch --sp-file <script> --dir drivers/gpu/drm/i915/gt \
					--linux-spacing --in-place

Signed-off-by: default avatarPankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200115034455.17658-7-pankaj.laxminarayan.bharadiya@intel.com
parent 85c823ac

drivers/gpu/drm/i915/gt/intel_engine_cs.c

+4 −4
Original line number Diff line number Diff line
@@ -448,8 +448,8 @@ int intel_engines_init_mmio(struct intel_gt *gt) 
	unsigned int i;

	int err;



	WARN_ON(engine_mask == 0);

	WARN_ON(engine_mask &

	drm_WARN_ON(&i915->drm, engine_mask == 0);

	drm_WARN_ON(&i915->drm, engine_mask &

		    GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES));



	if (i915_inject_probe_failure(i915))
@@ -471,7 +471,7 @@ int intel_engines_init_mmio(struct intel_gt *gt) 
	 * are added to the driver by a warning and disabling the forgotten

	 * engines.

	 */

	if (WARN_ON(mask != engine_mask))

	if (drm_WARN_ON(&i915->drm, mask != engine_mask))

		device_info->engine_mask = mask;



	RUNTIME_INFO(i915)->num_engines = hweight32(mask);

drivers/gpu/drm/i915/gt/intel_engine_user.c

+2 −1
Original line number Diff line number Diff line
@@ -278,7 +278,8 @@ void intel_engines_driver_register(struct drm_i915_private *i915) 
			}

		}



		if (WARN(errors, "Invalid UABI engine mapping found"))

		if (drm_WARN(&i915->drm, errors,

			     "Invalid UABI engine mapping found"))

			i915->uabi_engines = RB_ROOT;

	}

drivers/gpu/drm/i915/gt/intel_gtt.c

+3 −3
Original line number Diff line number Diff line
@@ -448,7 +448,7 @@ void gtt_write_workarounds(struct intel_gt *gt) 
		intel_uncore_write(uncore,

				   HSW_GTT_CACHE_EN,

				   can_use_gtt_cache ? GTT_CACHE_EN_ALL : 0);

		WARN_ON_ONCE(can_use_gtt_cache &&

		drm_WARN_ON_ONCE(&i915->drm, can_use_gtt_cache &&

				 intel_uncore_read(uncore,

						   HSW_GTT_CACHE_EN) == 0);

	}

drivers/gpu/drm/i915/gt/intel_mocs.c

+2 −2
Original line number Diff line number Diff line
@@ -300,7 +300,7 @@ static bool get_mocs_settings(const struct drm_i915_private *i915, 
		table->n_entries = GEN9_NUM_MOCS_ENTRIES;

		table->table = broxton_mocs_table;

	} else {

		WARN_ONCE(INTEL_GEN(i915) >= 9,

		drm_WARN_ONCE(&i915->drm, INTEL_GEN(i915) >= 9,

			      "Platform that should have a MOCS table does not.\n");

		return false;

	}

drivers/gpu/drm/i915/gt/intel_rc6.c

+1 −1
Original line number Diff line number Diff line
@@ -715,7 +715,7 @@ u64 intel_rc6_residency_ns(struct intel_rc6 *rc6, const i915_reg_t reg) 
	 */

	i = (i915_mmio_reg_offset(reg) -

	     i915_mmio_reg_offset(GEN6_GT_GFX_RC6_LOCKED)) / sizeof(u32);

	if (WARN_ON_ONCE(i >= ARRAY_SIZE(rc6->cur_residency)))

	if (drm_WARN_ON_ONCE(&i915->drm, i >= ARRAY_SIZE(rc6->cur_residency)))

		return 0;



	fw_domains = intel_uncore_forcewake_for_reg(uncore, reg, FW_REG_READ);

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