Commit 0d47638f authored Mar 10, 2016 by Dave Hansen Committed by Ingo Molnar Mar 11, 2016

x86/mm/pkeys: Fix mismerge of protection keys CPUID bits



Kirill Shutemov pointed this out to me.

The tip tree currently has commit:

	dfb4a70f [x86/cpufeature, x86/mm/pkeys: Add protection keys related CPUID definitions]

whioch added support for two new CPUID bits: X86_FEATURE_PKU and
X86_FEATURE_OSPKE.  But, those bits were mis-merged and put in
cpufeature.h instead of cpufeatures.h.

This didn't cause any breakage *except* it keeps the "ospke" and
"pku" bits from showing up in cpuinfo.

Now cpuinfo has the two new flags:

	flags	: ...  pku ospke

BTW, is it really wise to have cpufeature.h and cpufeatures.h?
It seems like they can only cause confusion and mahem with tab
completion.

Reported-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Dave Hansen <dave@sr71.net>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20160310221213.06F9DB53@viggo.jf.intel.com


Signed-off-by: Ingo Molnar <mingo@kernel.org>

parent 49cd53bf

arch/x86/include/asm/cpufeature.h

+0 −4

Original line number	Diff line number	Diff line
		@@ -94,10 +94,6 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
		(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
		x86_this_cpu_test_bit(bit, (unsigned long *)&cpu_info.x86_capability))

		/* Intel-defined CPU features, CPUID level 0x00000007:0 (ecx), word 16 */
		#define X86_FEATURE_PKU (1632+ 3) / Protection Keys for Userspace */
		#define X86_FEATURE_OSPKE (1632+ 4) / OS Protection Keys Enable */

		/*
		* This macro is for detection of features which need kernel
		* infrastructure to be used. It may not directly test the CPU

arch/x86/include/asm/cpufeatures.h

+4 −0

Original line number	Diff line number	Diff line
		@@ -270,6 +270,10 @@
		#define X86_FEATURE_PFTHRESHOLD (1532+12) / pause filter threshold */
		#define X86_FEATURE_AVIC (1532+13) / Virtual Interrupt Controller */

		/* Intel-defined CPU features, CPUID level 0x00000007:0 (ecx), word 16 */
		#define X86_FEATURE_PKU (1632+ 3) / Protection Keys for Userspace */
		#define X86_FEATURE_OSPKE (1632+ 4) / OS Protection Keys Enable */

		/*
		* BUG word(s)
		*/

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