selftests/powerpc: refactor entry and rfi_flush tests (0d239f3b) · Commits · 戴 / test

tools/testing/selftests/powerpc/include/utils.h

+5 −0

Original line number	Diff line number	Diff line
		@@ -42,6 +42,11 @@ int perf_event_enable(int fd);
		int perf_event_disable(int fd);
		int perf_event_reset(int fd);

		struct perf_event_read {
		__u64 nr;
		__u64 l1d_misses;
		};

		#if !defined(__GLIBC_PREREQ) \|\| !__GLIBC_PREREQ(2, 30)
		#include <unistd.h>
		#include <sys/syscall.h>

+2 −0

Original line number	Diff line number	Diff line
		@@ -11,3 +11,5 @@ $(TEST_GEN_PROGS): ../harness.c ../utils.c

		$(OUTPUT)/spectre_v2: CFLAGS += -m64
		$(OUTPUT)/spectre_v2: ../pmu/event.c branch_loops.S
		$(OUTPUT)/rfi_flush: flush_utils.c
		$(OUTPUT)/entry_flush: flush_utils.c

+1 −60

Original line number	Diff line number	Diff line
		@@ -15,66 +15,7 @@
		#include <string.h>
		#include <stdio.h>
		#include "utils.h"

		#define CACHELINE_SIZE 128

		struct perf_event_read {
		__u64 nr;
		__u64 l1d_misses;
		};

		static inline __u64 load(void *addr)
		{
		__u64 tmp;

		asm volatile("ld %0,0(%1)" : "=r"(tmp) : "b"(addr));

		return tmp;
		}

		static void syscall_loop(char *p, unsigned long iterations,
		unsigned long zero_size)
		{
		for (unsigned long i = 0; i < iterations; i++) {
		for (unsigned long j = 0; j < zero_size; j += CACHELINE_SIZE)
		load(p + j);
		getppid();
		}
		}

		static void sigill_handler(int signr, siginfo_t info, void unused)
		{
		static int warned;
		ucontext_t ctx = (ucontext_t )unused;
		unsigned long *pc = &UCONTEXT_NIA(ctx);

		/* mtspr 3,RS to check for move to DSCR below */
		if ((((unsigned int )*pc) & 0xfc1fffff) == 0x7c0303a6) {
		if (!warned++)
		printf("WARNING: Skipping over dscr setup. Consider running 'ppc64_cpu --dscr=1' manually.\n");
		*pc += 4;
		} else {
		printf("SIGILL at %p\n", pc);
		abort();
		}
		}

		static void set_dscr(unsigned long val)
		{
		static int init;
		struct sigaction sa;

		if (!init) {
		memset(&sa, 0, sizeof(sa));
		sa.sa_sigaction = sigill_handler;
		sa.sa_flags = SA_SIGINFO;
		if (sigaction(SIGILL, &sa, NULL))
		perror("sigill_handler");
		init = 1;
		}

		asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
		}
		#include "flush_utils.h"

		int entry_flush_test(void)
		{

0 → 100644

+70 −0

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0+

		/*
		* Copyright 2018 IBM Corporation.
		*/

		#define __SANE_USERSPACE_TYPES__

		#include <sys/types.h>
		#include <stdint.h>
		#include <unistd.h>
		#include <signal.h>
		#include <stdlib.h>
		#include <string.h>
		#include <stdio.h>
		#include "utils.h"
		#include "flush_utils.h"

		static inline __u64 load(void *addr)
		{
		__u64 tmp;

		asm volatile("ld %0,0(%1)" : "=r"(tmp) : "b"(addr));

		return tmp;
		}

		void syscall_loop(char *p, unsigned long iterations,
		unsigned long zero_size)
		{
		for (unsigned long i = 0; i < iterations; i++) {
		for (unsigned long j = 0; j < zero_size; j += CACHELINE_SIZE)
		load(p + j);
		getppid();
		}
		}

		static void sigill_handler(int signr, siginfo_t info, void unused)
		{
		static int warned;
		ucontext_t ctx = (ucontext_t )unused;
		unsigned long *pc = &UCONTEXT_NIA(ctx);

		/* mtspr 3,RS to check for move to DSCR below */
		if ((((unsigned int )*pc) & 0xfc1fffff) == 0x7c0303a6) {
		if (!warned++)
		printf("WARNING: Skipping over dscr setup. Consider running 'ppc64_cpu --dscr=1' manually.\n");
		*pc += 4;
		} else {
		printf("SIGILL at %p\n", pc);
		abort();
		}
		}

		void set_dscr(unsigned long val)
		{
		static int init;
		struct sigaction sa;

		if (!init) {
		memset(&sa, 0, sizeof(sa));
		sa.sa_sigaction = sigill_handler;
		sa.sa_flags = SA_SIGINFO;
		if (sigaction(SIGILL, &sa, NULL))
		perror("sigill_handler");
		init = 1;
		}

		asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
		}

0 → 100644

+17 −0

Original line number	Diff line number	Diff line
		/* SPDX-License-Identifier: GPL-2.0+ */

		/*
		* Copyright 2018 IBM Corporation.
		*/

		#ifndef _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H
		#define _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H

		#define CACHELINE_SIZE 128

		void syscall_loop(char *p, unsigned long iterations,
		unsigned long zero_size);

		void set_dscr(unsigned long val);

		#endif /* _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H */