Commit 0d0d4982 authored by Thierry Reding's avatar Thierry Reding Committed by Ben Skeggs
Browse files

drm/nouveau/ltc/gp10b: Add custom L2 cache implementation 



There are extra registers that need to be programmed to make the level 2
cache work on GP10B, such as the stream ID register that is used when an
SMMU is used to translate memory addresses.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 6992ceb8

drivers/gpu/drm/nouveau/include/nvkm/subdev/ltc.h

+1 −0
Original line number Diff line number Diff line
@@ -40,4 +40,5 @@ int gm107_ltc_new(struct nvkm_device *, int, struct nvkm_ltc **); 
int gm200_ltc_new(struct nvkm_device *, int, struct nvkm_ltc **);

int gp100_ltc_new(struct nvkm_device *, int, struct nvkm_ltc **);

int gp102_ltc_new(struct nvkm_device *, int, struct nvkm_ltc **);

int gp10b_ltc_new(struct nvkm_device *, int, struct nvkm_ltc **);

#endif

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

+1 −1
Original line number Diff line number Diff line
@@ -2380,7 +2380,7 @@ nv13b_chipset = { 
	.fuse = gm107_fuse_new,

	.ibus = gp10b_ibus_new,

	.imem = gk20a_instmem_new,

	.ltc = gp102_ltc_new,

	.ltc = gp10b_ltc_new,

	.mc = gp10b_mc_new,

	.mmu = gp10b_mmu_new,

	.secboot = gp10b_secboot_new,

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/Kbuild

+1 −0
Original line number Diff line number Diff line
@@ -6,3 +6,4 @@ nvkm-y += nvkm/subdev/ltc/gm107.o 
nvkm-y += nvkm/subdev/ltc/gm200.o

nvkm-y += nvkm/subdev/ltc/gp100.o

nvkm-y += nvkm/subdev/ltc/gp102.o

nvkm-y += nvkm/subdev/ltc/gp10b.o

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp10b.c

0 → 100644
+65 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2019 NVIDIA Corporation.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 * Authors: Thierry Reding

 */



#include "priv.h"



static void

gp10b_ltc_init(struct nvkm_ltc *ltc)

{

	struct nvkm_device *device = ltc->subdev.device;

	struct iommu_fwspec *spec;



	nvkm_wr32(device, 0x17e27c, ltc->ltc_nr);

	nvkm_wr32(device, 0x17e000, ltc->ltc_nr);

	nvkm_wr32(device, 0x100800, ltc->ltc_nr);



	spec = dev_iommu_fwspec_get(device->dev);

	if (spec) {

		u32 sid = spec->ids[0] & 0xffff;



		/* stream ID */

		nvkm_wr32(device, 0x160000, sid << 2);

	}

}



static const struct nvkm_ltc_func

gp10b_ltc = {

	.oneinit = gp100_ltc_oneinit,

	.init = gp10b_ltc_init,

	.intr = gp100_ltc_intr,

	.cbc_clear = gm107_ltc_cbc_clear,

	.cbc_wait = gm107_ltc_cbc_wait,

	.zbc = 16,

	.zbc_clear_color = gm107_ltc_zbc_clear_color,

	.zbc_clear_depth = gm107_ltc_zbc_clear_depth,

	.zbc_clear_stencil = gp102_ltc_zbc_clear_stencil,

	.invalidate = gf100_ltc_invalidate,

	.flush = gf100_ltc_flush,

};



int

gp10b_ltc_new(struct nvkm_device *device, int index, struct nvkm_ltc **pltc)

{

	return nvkm_ltc_new_(&gp10b_ltc, device, index, pltc);

}

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/priv.h

+2 −0
Original line number Diff line number Diff line
@@ -46,4 +46,6 @@ void gm107_ltc_zbc_clear_depth(struct nvkm_ltc *, int, const u32); 
int gp100_ltc_oneinit(struct nvkm_ltc *);

void gp100_ltc_init(struct nvkm_ltc *);

void gp100_ltc_intr(struct nvkm_ltc *);



void gp102_ltc_zbc_clear_stencil(struct nvkm_ltc *, int, const u32);

#endif

CRA Git | Maintained and supported by SUSTech CRA and CCSE